From: Misha Brukman <brukman+llvm@gmail.com>
Date: Fri, 25 Jun 2004 18:36:53 +0000 (+0000)
Subject: Fix opcode: no immediate in an `or r1, r2, r3' (all registers) instr.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=972569a22f4add23e03d750a130ebede99575eb0;p=oota-llvm.git

Fix opcode: no immediate in an `or r1, r2, r3' (all registers) instr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14411 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 6f214f88cfd..a75a4b0aaae 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -1052,7 +1052,7 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
     break;
   case cInt:
     // Move value into target register (32->32)
-    BuildMI(BB, PPC32::ORI, 2, targetReg).addReg(Reg).addReg(Reg);
+    BuildMI(BB, PPC32::OR, 2, targetReg).addReg(Reg).addReg(Reg);
     break;
   default:
     assert(0 && "Unpromotable operand class in promote32");
diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp
index 6f214f88cfd..a75a4b0aaae 100644
--- a/lib/Target/PowerPC/PowerPCISelSimple.cpp
+++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp
@@ -1052,7 +1052,7 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
     break;
   case cInt:
     // Move value into target register (32->32)
-    BuildMI(BB, PPC32::ORI, 2, targetReg).addReg(Reg).addReg(Reg);
+    BuildMI(BB, PPC32::OR, 2, targetReg).addReg(Reg).addReg(Reg);
     break;
   default:
     assert(0 && "Unpromotable operand class in promote32");