From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Fri, 6 Oct 2006 20:33:26 +0000 (+0000)
Subject: add optional input flag to FMRRD
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=935b1f8fce78d1a33251aec02dcd0108b8dd0366;p=oota-llvm.git

add optional input flag to FMRRD


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30774 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index beb0d6775ad..4e417173480 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -284,8 +284,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
 
       Ops.push_back(DAG.getRegister(Reg2, MVT::i32));
       SDVTList    VTs = DAG.getVTList(MVT::Other, MVT::Flag);
-      SDOperand Ops[] = {Chain, SDReg1, SDReg2, Arg}; //missing flag
-      Chain = DAG.getNode(ARMISD::FMRRD, VTs, Ops, 4);
+      SDOperand Ops[] = {Chain, SDReg1, SDReg2, Arg, InFlag};
+      Chain = DAG.getNode(ARMISD::FMRRD, VTs, Ops, InFlag.Val ? 5 : 4);
     } else {
       if (VT == MVT::f32)
         Arg = DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Arg);
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index cf08487b3ce..cbdc5b96286 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -78,7 +78,8 @@ def armfsitos    : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
 def armfsitod      : SDNode<"ARMISD::FSITOD", SDTUnaryOp>;
 
 def SDTarmfmrrd    : SDTypeProfile<0, 3, [SDTCisInt<0>, SDTCisInt<1>, SDTCisFP<2>]>;
-def armfmrrd       : SDNode<"ARMISD::FMRRD", SDTarmfmrrd, [SDNPHasChain, SDNPOutFlag]>;
+def armfmrrd       : SDNode<"ARMISD::FMRRD", SDTarmfmrrd,
+                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
 def SDTarmfmdrr    : SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisInt<1>, SDTCisInt<2>]>;
 def armfmdrr       : SDNode<"ARMISD::FMDRR", SDTarmfmdrr, []>;