From: Bill Wendling <isanbard@gmail.com>
Date: Wed, 10 Nov 2010 01:07:54 +0000 (+0000)
Subject: Emit a '!' if this is a "writeback" register or memory address.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=8ea974039a8811ff83ad2c45ec1037ac78e5afab;p=oota-llvm.git

Emit a '!' if this is a "writeback" register or memory address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118662 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 65f0ad4bb50..e00ced265e3 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -382,10 +382,10 @@ void ARMOperand::dump(raw_ostream &OS) const {
     getImm()->print(OS);
     break;
   case Memory:
-    OS << "<memory>";
+    OS << "<memory" << (!Mem.Writeback ? ">" : "!>");
     break;
   case Register:
-    OS << "<register " << getReg() << ">";
+    OS << "<register " << getReg() << (!Reg.Writeback ? ">" : "!>");
     break;
   case RegisterList: {
     OS << "<register_list ";