From: Chandler Carruth Date: Wed, 18 Sep 2013 14:08:30 +0000 (+0000) Subject: Name the XCore target-specific subdirectories canonically. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=89ec610f76ead733cbbaf9da3c55b63eaf16ec88;p=oota-llvm.git Name the XCore target-specific subdirectories canonically. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190940 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/LoopVectorize/XCore/lit.local.cfg b/test/Transforms/LoopVectorize/XCore/lit.local.cfg new file mode 100644 index 00000000000..4d17d464204 --- /dev/null +++ b/test/Transforms/LoopVectorize/XCore/lit.local.cfg @@ -0,0 +1,3 @@ +targets = set(config.root.targets_to_build.split()) +if not 'XCore' in targets: + config.unsupported = True diff --git a/test/Transforms/LoopVectorize/XCore/no-vector-registers.ll b/test/Transforms/LoopVectorize/XCore/no-vector-registers.ll new file mode 100644 index 00000000000..a099daa740e --- /dev/null +++ b/test/Transforms/LoopVectorize/XCore/no-vector-registers.ll @@ -0,0 +1,23 @@ +; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-unroll=2 -S -mtriple=xcore | FileCheck %s + +target datalayout = "e-p:32:32:32-a0:0:32-n32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:32-f32:32:32-f64:32:32" +target triple = "xcore" +; The xcore target has no vector registers, so loop should not be vectorized. +;CHECK-LABEL: @f( +;CHECK: entry: +;CHECK-NOT: vector.body +;CHECK-NEXT: br label %do.body +define void @f(i8* nocapture %ptr, i32 %len) { +entry: + br label %do.body +do.body: + %ptr.addr.0 = phi i8* [ %ptr, %entry ], [ %incdec.ptr, %do.body ] + %len.addr.0 = phi i32 [ %len, %entry ], [ %dec, %do.body ] + %incdec.ptr = getelementptr inbounds i8* %ptr.addr.0, i32 1 + store i8 0, i8* %ptr.addr.0, align 1 + %dec = add nsw i32 %len.addr.0, -1 + %tobool = icmp eq i32 %len.addr.0, 0 + br i1 %tobool, label %do.end, label %do.body +do.end: + ret void +} diff --git a/test/Transforms/LoopVectorize/xcore/lit.local.cfg b/test/Transforms/LoopVectorize/xcore/lit.local.cfg deleted file mode 100644 index 4d17d464204..00000000000 --- a/test/Transforms/LoopVectorize/xcore/lit.local.cfg +++ /dev/null @@ -1,3 +0,0 @@ -targets = set(config.root.targets_to_build.split()) -if not 'XCore' in targets: - config.unsupported = True diff --git a/test/Transforms/LoopVectorize/xcore/no-vector-registers.ll b/test/Transforms/LoopVectorize/xcore/no-vector-registers.ll deleted file mode 100644 index a099daa740e..00000000000 --- a/test/Transforms/LoopVectorize/xcore/no-vector-registers.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-unroll=2 -S -mtriple=xcore | FileCheck %s - -target datalayout = "e-p:32:32:32-a0:0:32-n32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:32-f32:32:32-f64:32:32" -target triple = "xcore" -; The xcore target has no vector registers, so loop should not be vectorized. -;CHECK-LABEL: @f( -;CHECK: entry: -;CHECK-NOT: vector.body -;CHECK-NEXT: br label %do.body -define void @f(i8* nocapture %ptr, i32 %len) { -entry: - br label %do.body -do.body: - %ptr.addr.0 = phi i8* [ %ptr, %entry ], [ %incdec.ptr, %do.body ] - %len.addr.0 = phi i32 [ %len, %entry ], [ %dec, %do.body ] - %incdec.ptr = getelementptr inbounds i8* %ptr.addr.0, i32 1 - store i8 0, i8* %ptr.addr.0, align 1 - %dec = add nsw i32 %len.addr.0, -1 - %tobool = icmp eq i32 %len.addr.0, 0 - br i1 %tobool, label %do.end, label %do.body -do.end: - ret void -} diff --git a/test/Transforms/SLPVectorizer/XCore/lit.local.cfg b/test/Transforms/SLPVectorizer/XCore/lit.local.cfg new file mode 100644 index 00000000000..4d17d464204 --- /dev/null +++ b/test/Transforms/SLPVectorizer/XCore/lit.local.cfg @@ -0,0 +1,3 @@ +targets = set(config.root.targets_to_build.split()) +if not 'XCore' in targets: + config.unsupported = True diff --git a/test/Transforms/SLPVectorizer/XCore/no-vector-registers.ll b/test/Transforms/SLPVectorizer/XCore/no-vector-registers.ll new file mode 100644 index 00000000000..66392e74cb3 --- /dev/null +++ b/test/Transforms/SLPVectorizer/XCore/no-vector-registers.ll @@ -0,0 +1,24 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=xcore | FileCheck %s + +target datalayout = "e-p:32:32:32-a0:0:32-n32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:32-f32:32:32-f64:32:32" +target triple = "xcore" + +; Simple 3-pair chain with loads and stores +; CHECK: test1 +; CHECK-NOT: <2 x double> +define void @test1(double* %a, double* %b, double* %c) { +entry: + %i0 = load double* %a, align 8 + %i1 = load double* %b, align 8 + %mul = fmul double %i0, %i1 + %arrayidx3 = getelementptr inbounds double* %a, i64 1 + %i3 = load double* %arrayidx3, align 8 + %arrayidx4 = getelementptr inbounds double* %b, i64 1 + %i4 = load double* %arrayidx4, align 8 + %mul5 = fmul double %i3, %i4 + store double %mul, double* %c, align 8 + %arrayidx5 = getelementptr inbounds double* %c, i64 1 + store double %mul5, double* %arrayidx5, align 8 + ret void +} + diff --git a/test/Transforms/SLPVectorizer/xcore/lit.local.cfg b/test/Transforms/SLPVectorizer/xcore/lit.local.cfg deleted file mode 100644 index 4d17d464204..00000000000 --- a/test/Transforms/SLPVectorizer/xcore/lit.local.cfg +++ /dev/null @@ -1,3 +0,0 @@ -targets = set(config.root.targets_to_build.split()) -if not 'XCore' in targets: - config.unsupported = True diff --git a/test/Transforms/SLPVectorizer/xcore/no-vector-registers.ll b/test/Transforms/SLPVectorizer/xcore/no-vector-registers.ll deleted file mode 100644 index 66392e74cb3..00000000000 --- a/test/Transforms/SLPVectorizer/xcore/no-vector-registers.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=xcore | FileCheck %s - -target datalayout = "e-p:32:32:32-a0:0:32-n32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:32-f32:32:32-f64:32:32" -target triple = "xcore" - -; Simple 3-pair chain with loads and stores -; CHECK: test1 -; CHECK-NOT: <2 x double> -define void @test1(double* %a, double* %b, double* %c) { -entry: - %i0 = load double* %a, align 8 - %i1 = load double* %b, align 8 - %mul = fmul double %i0, %i1 - %arrayidx3 = getelementptr inbounds double* %a, i64 1 - %i3 = load double* %arrayidx3, align 8 - %arrayidx4 = getelementptr inbounds double* %b, i64 1 - %i4 = load double* %arrayidx4, align 8 - %mul5 = fmul double %i3, %i4 - store double %mul, double* %c, align 8 - %arrayidx5 = getelementptr inbounds double* %c, i64 1 - store double %mul5, double* %arrayidx5, align 8 - ret void -} -