From: Chris Lattner <sabre@nondot.org>
Date: Fri, 30 Sep 2005 17:46:55 +0000 (+0000)
Subject: Update the discussion of TargetRegisterDesc
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=88a06d2e3ef598a902abc7c0cfb0bd65ab3a7252;p=oota-llvm.git

Update the discussion of TargetRegisterDesc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index fcbff1c44bb..a62dbedcdb1 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -358,9 +358,9 @@ description) are unique small numbers, and virtual registers are generally
 large.</p>
 
 <p>Each register in the processor description has an associated
-<tt>MRegisterDesc</tt> entry, which provides a textual name for the register
-(used for assembly output and debugging dumps), a set of aliases (used to
-indicate that one register overlaps with another), and some flag bits.
+<tt>TargetRegisterDesc</tt> entry, which provides a textual name for the register
+(used for assembly output and debugging dumps) and a set of aliases (used to
+indicate that one register overlaps with another).
 </p>
 
 <p>In addition to the per-register description, the <tt>MRegisterInfo</tt> class