From: Andrew Trick <atrick@apple.com>
Date: Thu, 7 Mar 2013 19:21:08 +0000 (+0000)
Subject: pre-RA-sched debug-only fix
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=877fcf52d17f1cadc38112ca988cdd4e666bac24;p=oota-llvm.git

pre-RA-sched debug-only fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176638 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index f843584a91c..c009cfcc516 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1360,8 +1360,10 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {
     SmallVector<unsigned, 4> LRegs;
     if (!DelayForLiveRegsBottomUp(CurSU, LRegs))
       break;
-    DEBUG(dbgs() << "    Interfering reg " << TRI->getName(LRegs[0])
-          << " SU #" << CurSU->NodeNum << '\n');
+    DEBUG(dbgs() << "    Interfering reg " <<
+          (LRegs[0] == TRI->getNumRegs() ? "CallResource"
+           : TRI->getName(LRegs[0]))
+           << " SU #" << CurSU->NodeNum << '\n');
     std::pair<LRegsMapT::iterator, bool> LRegsPair =
       LRegsMap.insert(std::make_pair(CurSU, LRegs));
     if (LRegsPair.second) {