From: Dan Gohman <gohman@apple.com>
Date: Thu, 7 Aug 2008 02:23:06 +0000 (+0000)
Subject: Add an extra example that shouldn't get an and instruction.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=865db4566e84b788e5738fec462804a779223b8b;p=oota-llvm.git

Add an extra example that shouldn't get an and instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54443 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/X86/zext-inreg-1.ll b/test/CodeGen/X86/zext-inreg-1.ll
index 6a678b2e3b2..bc8e482d562 100644
--- a/test/CodeGen/X86/zext-inreg-1.ll
+++ b/test/CodeGen/X86/zext-inreg-1.ll
@@ -6,7 +6,12 @@
 ; These should use movzbl instead of 'and 255'.
 ; This related to not having ZERO_EXTEND_REG node.
 
-define i64 @h(i64 %d) nounwind  {
+define i64 @l(i64 %d) nounwind  {
+        %e = add i64 %d, 1
+        %retval = and i64 %e, 1099511627775
+        ret i64 %retval
+}
+define i64 @m(i64 %d) nounwind  {
         %e = add i64 %d, 1
         %retval = and i64 %e, 281474976710655
         ret i64 %retval