From: Rafael Espindola Date: Wed, 6 Apr 2011 17:19:35 +0000 (+0000) Subject: The original issue has been fixed by not doing unnecessary sign extensions. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=8617897aaa71381c9a9f6d51b117d0d6e217cfe3;p=oota-llvm.git The original issue has been fixed by not doing unnecessary sign extensions. Change the test to force a sign extension and expose the problem again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129011 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index 77a513de8a7..b339e89e5a6 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -1656,23 +1656,26 @@ information to add the "lock" prefix. //===---------------------------------------------------------------------===// -_Bool bar(int *x) { return *x & 1; } +struct B { + unsigned char y0 : 1; +}; -define zeroext i1 @bar(i32* nocapture %x) nounwind readonly { -entry: - %tmp1 = load i32* %x ; [#uses=1] - %and = and i32 %tmp1, 1 ; [#uses=1] - %tobool = icmp ne i32 %and, 0 ; [#uses=1] - ret i1 %tobool +int bar(struct B* a) { return a->y0; } + +define i32 @bar(%struct.B* nocapture %a) nounwind readonly optsize { + %1 = getelementptr inbounds %struct.B* %a, i64 0, i32 0 + %2 = load i8* %1, align 1 + %3 = and i8 %2, 1 + %4 = zext i8 %3 to i32 + ret i32 %4 } -bar: # @bar -# BB#0: # %entry - movl 4(%esp), %eax - movb (%eax), %al - andb $1, %al - movzbl %al, %eax - ret +bar: # @bar +# BB#0: + movb (%rdi), %al + andb $1, %al + movzbl %al, %eax + ret Missed optimization: should be movl+andl.