From: Johnny Chen <johnny.chen@apple.com>
Date: Thu, 7 Apr 2011 01:05:52 +0000 (+0000)
Subject: The ARM disassembler was not recognizing USADA8 instruction.  Need to add checking... 
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=8424a60fc9059d4ba7c45c80d28d86e3186fcf4e;p=oota-llvm.git

The ARM disassembler was not recognizing USADA8 instruction.  Need to add checking for register values
for USAD8 and USADA8.

rdar://problem/9247060


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129047 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
index fd4948552e2..48a748b8ca7 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
@@ -536,7 +536,7 @@ static bool BadRegsMulFrm(unsigned Opcode, uint32_t insn) {
     return false;
   case ARM::MLA:     case ARM::MLS:     case ARM::SMLABB:  case ARM::SMLABT:
   case ARM::SMLATB:  case ARM::SMLATT:  case ARM::SMLAWB:  case ARM::SMLAWT:
-  case ARM::SMMLA:   case ARM::SMMLS:
+  case ARM::SMMLA:   case ARM::SMMLS:   case ARM::USADA8:
     if (R19_16 == 15 || R15_12 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
@@ -545,6 +545,7 @@ static bool BadRegsMulFrm(unsigned Opcode, uint32_t insn) {
   case ARM::SMUAD:   case ARM::SMUADX:
   // A8.6.167 SMLAD & A8.6.172 SMLSD
   case ARM::SMLAD:   case ARM::SMLADX:  case ARM::SMLSD:   case ARM::SMLSDX:
+  case ARM::USAD8:
     if (R19_16 == 15 || R11_8 == 15 || R3_0 == 15)
       return true;
     return false;
@@ -562,12 +563,13 @@ static bool BadRegsMulFrm(unsigned Opcode, uint32_t insn) {
 
 // Multiply Instructions.
 // MLA, MLS, SMLABB, SMLABT, SMLATB, SMLATT, SMLAWB, SMLAWT, SMMLA, SMMLS,
-// SMLAD, SMLADX, SMLSD, SMLSDX:
+// SMLAD, SMLADX, SMLSD, SMLSDX, USADA8 (for convenience):
 //     Rd{19-16} Rn{3-0} Rm{11-8} Ra{15-12}
 // But note that register checking for {SMLAD, SMLADX, SMLSD, SMLSDX} is
 // only for {d, n, m}.
 //
-// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT, SMUAD, SMUADX:
+// MUL, SMMUL, SMULBB, SMULBT, SMULTB, SMULTT, SMULWB, SMULWT, SMUAD, SMUADX,
+// USAD8 (for convenience):
 //     Rd{19-16} Rn{3-0} Rm{11-8}
 //
 // SMLAL, SMULL, UMAAL, UMLAL, UMULL, SMLALBB, SMLALBT, SMLALTB, SMLALTT,
diff --git a/test/MC/Disassembler/ARM/neon-tests.txt b/test/MC/Disassembler/ARM/neon-tests.txt
index 3a0a4a63fc9..63a3756c7c8 100644
--- a/test/MC/Disassembler/ARM/neon-tests.txt
+++ b/test/MC/Disassembler/ARM/neon-tests.txt
@@ -77,3 +77,6 @@
 
 # CHECK:	vmov	r1, r0, d11
 0x1b 0x1b 0x50 0xec
+
+# CHECK:	usada8mi	r8, r9, r5, r9
+0x19 0x95 0x88 0x47