From: Andrew Trick Date: Sun, 1 Apr 2012 07:24:23 +0000 (+0000) Subject: misched: Add finalizeScheduler to complete the target interface. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=830da405fa32ab4f2a8378a658e1429a9ffd4d65;p=oota-llvm.git misched: Add finalizeScheduler to complete the target interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153827 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/ScheduleDAGInstrs.h b/include/llvm/CodeGen/ScheduleDAGInstrs.h index a08f6cc7f70..c8de7bc8f89 100644 --- a/include/llvm/CodeGen/ScheduleDAGInstrs.h +++ b/include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -296,6 +296,10 @@ namespace llvm { /// overriding enterRegion() or exitRegion(). virtual void schedule() = 0; + /// finalizeSchedule - Allow targets to perform final scheduling actions at + /// the level of the whole MachineFunction. By default does nothing. + virtual void finalizeSchedule() {} + virtual void dumpNode(const SUnit *SU) const; /// Return a label for a DAG node that points to an instruction. diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index 364a2442759..1d3241b8cc6 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -227,6 +227,7 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) { assert(RemainingCount == 0 && "Instruction count mismatch!"); Scheduler->finishBlock(); } + Scheduler->finalizeSchedule(); DEBUG(LIS->print(dbgs())); return true; }