From: Bruno Cardoso Lopes <bruno.cardoso@gmail.com>
Date: Sat, 4 Sep 2010 02:50:13 +0000 (+0000)
Subject: make explicit that we not handle several mmx shuffles
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=828f6ae03c214609fec1fce8cd32f4fcf2645f57;p=oota-llvm.git

make explicit that we not handle several mmx shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113058 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 45052da9915..147f201ac67 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5467,19 +5467,19 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
   SmallVector<int, 16> M;
   SVOp->getMask(M);
 
-  // Very little shuffling can be done for 64-bit vectors right now.
+  if (isPALIGNRMask(M, VT, HasSSSE3))
+    return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
+                                X86::getShufflePALIGNRImmediate(SVOp),
+                                DAG);
+
+  // MMX shuffles not already handled must be expanded.
   if (VT.getSizeInBits() == 64)
-    return isPALIGNRMask(M, VT, Subtarget->hasSSSE3()) ? Op : SDValue();
+    return SDValue();
 
   // FIXME: pshufb, blends, shifts.
   if (VT.getVectorNumElements() == 2)
     return Op;
 
-  if (isPALIGNRMask(M, VT, HasSSSE3))
-    return getTargetShuffleNode(X86ISD::PALIGN, dl, VT, V1, V2,
-                                X86::getShufflePALIGNRImmediate(SVOp),
-                                DAG);
-
   if (ShuffleVectorSDNode::isSplatMask(&M[0], VT) &&
       SVOp->getSplatIndex() == 0 && V2IsUndef) {
     if (VT == MVT::v2f64)