From: Daniel Dunbar <daniel@zuster.org>
Date: Wed, 19 May 2010 08:07:12 +0000 (+0000)
Subject: MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=7d4bd203be35a25e31256eeea4ef7628573ffa54;p=oota-llvm.git

MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
CALL64pcrel32, for the same reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104116 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
index c2a42932f56..ec90fd6fe8d 100644
--- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
+++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
@@ -364,9 +364,11 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
     LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr
     break;
 
-  // CALL64r, CALL64pcrel32 - These instructions have register inputs modeled as
-  // normal uses instead of implicit uses.  As such, truncate off all but the
-  // first operand (the callee).  FIXME: Change isel.
+  // TAILJMPr, TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions have
+  // register inputs modeled as normal uses instead of implicit uses.  As such,
+  // truncate off all but the first operand (the callee).  FIXME: Change isel.
+  case X86::TAILJMPr:
+  case X86::TAILJMPr64:
   case X86::CALL64r:
   case X86::CALL64pcrel32: {
     unsigned Opcode = OutMI.getOpcode();