From: Evan Cheng Date: Sat, 12 Jun 2010 00:12:18 +0000 (+0000) Subject: Allow target to provide its own hazard recognizer to post-ra scheduler. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=729aab3dd3a6ea5ca23430936270154090fcc10b;p=oota-llvm.git Allow target to provide its own hazard recognizer to post-ra scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 855400318aa..c730f979e73 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -20,12 +20,14 @@ namespace llvm { class CalleeSavedInfo; +class InstrItineraryData; class LiveVariables; class MCAsmInfo; class MachineMemOperand; class MDNode; class MCInst; class SDNode; +class ScheduleHazardRecognizer; class SelectionDAG; class TargetRegisterClass; class TargetRegisterInfo; @@ -575,6 +577,12 @@ public: /// length. virtual unsigned getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const; + + /// CreateTargetHazardRecognizer - Allocate and return a hazard recognizer + /// to use for this target when scheduling the machine instructions after + /// register allocation. + virtual ScheduleHazardRecognizer* + CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const = 0; }; /// TargetInstrInfoImpl - This is the default implementation of @@ -602,6 +610,9 @@ public: virtual bool produceSameValue(const MachineInstr *MI0, const MachineInstr *MI1) const; virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const; + + virtual ScheduleHazardRecognizer * + CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const; }; } // End llvm namespace diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp index 9714ea653b5..d41463f3894 100644 --- a/lib/CodeGen/PostRASchedulerList.cpp +++ b/lib/CodeGen/PostRASchedulerList.cpp @@ -67,8 +67,8 @@ EnableAntiDepBreaking("break-anti-dependencies", cl::init("none"), cl::Hidden); static cl::opt EnablePostRAHazardAvoidance("avoid-hazards", - cl::desc("Enable exact hazard avoidance"), - cl::init(true), cl::Hidden); + cl::desc("Enable exact hazard avoidance"), + cl::init(true), cl::Hidden); // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod static cl::opt @@ -237,10 +237,10 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) { const MachineLoopInfo &MLI = getAnalysis(); const MachineDominatorTree &MDT = getAnalysis(); - const InstrItineraryData &InstrItins = Fn.getTarget().getInstrItineraryData(); - ScheduleHazardRecognizer *HR = EnablePostRAHazardAvoidance ? - (ScheduleHazardRecognizer *)new ExactHazardRecognizer(InstrItins) : - (ScheduleHazardRecognizer *)new SimpleHazardRecognizer(); + const TargetMachine &TM = Fn.getTarget(); + const InstrItineraryData &InstrItins = TM.getInstrItineraryData(); + ScheduleHazardRecognizer *HR = + TM.getInstrInfo()->CreateTargetPostRAHazardRecognizer(InstrItins); AntiDepBreaker *ADB = ((AntiDepMode == TargetSubtarget::ANTIDEP_ALL) ? (AntiDepBreaker *)new AggressiveAntiDepBreaker(Fn, CriticalPathRCs) : @@ -719,6 +719,16 @@ void SchedulePostRATDList::ListScheduleTopDown() { #endif } +// Default implementation of CreateTargetPostRAHazardRecognizer. This should +// be in TargetInstrInfoImpl.cpp except it reference local command line +// option EnablePostRAHazardAvoidance +ScheduleHazardRecognizer *TargetInstrInfoImpl:: +CreateTargetPostRAHazardRecognizer(const InstrItineraryData &II) const { + if (EnablePostRAHazardAvoidance) + return (ScheduleHazardRecognizer *)new ExactHazardRecognizer(II); + return (ScheduleHazardRecognizer *)new SimpleHazardRecognizer(); +} + //===----------------------------------------------------------------------===// // Public Constructor Functions //===----------------------------------------------------------------------===//