From: Bruno Cardoso Lopes <bruno.cardoso@gmail.com>
Date: Fri, 16 Sep 2011 22:02:14 +0000 (+0000)
Subject: Add mayLoad attribute to AVX convert instructions, since non of them
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=7291272ab21e8a899bf295fc544e4a00973a82b5;p=oota-llvm.git

Add mayLoad attribute to AVX convert instructions, since non of them
are declared with load patterns. This fix the crash in PR10941. No testcases,
since a fold is triggered and then converted back to the register form
afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139953 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 0afc5399e14..fda3b149def 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1340,6 +1340,7 @@ multiclass sse12_vcvt_avx<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
                           X86MemOperand x86memop, string asm> {
   def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src),
               !strconcat(asm,"\t{$src, $src1, $dst|$dst, $src1, $src}"), []>;
+  let mayLoad = 1 in
   def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst),
               (ins DstRC:$src1, x86memop:$src),
               !strconcat(asm,"\t{$src, $src1, $dst|$dst, $src1, $src}"), []>;