From: Sanjiv Gupta Date: Thu, 9 Apr 2009 04:03:43 +0000 (+0000) Subject: r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom... X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=6e2a46a0b40512f4724c40db675cf307dba22660;p=oota-llvm.git r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68671 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp index c8e58a6543f..5996d886ad7 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.cpp +++ b/lib/Target/PIC16/PIC16ISelLowering.cpp @@ -1359,21 +1359,26 @@ SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) { // Put one value on stack. SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl); + // ADDC and ADDE produces two results. SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag); + // ADDE has three operands, the last one is a flag. if (Op.getOpcode() == ISD::ADDE) return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1), NewVal, Op.getOperand(2)); - else + // ADDC has two operands. + else if (Op.getOpcode() == ISD::ADDC) return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1), NewVal); + // ADD it is. It produces only one result. + else + return DAG.getNode(Op.getOpcode(), dl, MVT::i8, Op.getOperand(MemOp ^ 1), + NewVal); } - else if (Op.getOpcode() == ISD::ADD) { + else if (Op.getOpcode() == ISD::ADD) return Op; - } - else { + else return SDValue(); - } } SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {