From: Kevin Enderby Date: Fri, 13 Apr 2012 18:46:37 +0000 (+0000) Subject: For ARM disassembly only print 32 unsigned bits for the address of branch X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=6c22695c6d10036f5635caec7ea84dbe84cc6bea;p=oota-llvm.git For ARM disassembly only print 32 unsigned bits for the address of branch targets so if the branch target has the high bit set it does not get printed as: beq 0xffffffff8008c404 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154685 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index b3eeafe0831..cbd81c11a45 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -209,12 +209,12 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, } else { assert(Op.isExpr() && "unknown operand kind in printOperand"); // If a symbolic branch target was added as a constant expression then print - // that address in hex. + // that address in hex. And only print 32 unsigned bits for the address. const MCConstantExpr *BranchTarget = dyn_cast(Op.getExpr()); int64_t Address; if (BranchTarget && BranchTarget->EvaluateAsAbsolute(Address)) { O << "0x"; - O.write_hex(Address); + O.write_hex((uint32_t)Address); } else { // Otherwise, just print the expression.