From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 14 Jan 2015 15:42:34 +0000 (+0000)
Subject: R600/SI: Use IMPLICIT_DEF and KILL when failing to spill VGPRs
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=65e0a4d4da3b161932f29707b0401902007b7dbb;p=oota-llvm.git

R600/SI: Use IMPLICIT_DEF and KILL when failing to spill VGPRs

This helps us avoid 'invalid register class for operand' verifier
errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225989 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp
index 71872ee492a..1a4c0d4e57b 100644
--- a/lib/Target/R600/SIInstrInfo.cpp
+++ b/lib/Target/R600/SIInstrInfo.cpp
@@ -488,7 +488,7 @@ void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
     LLVMContext &Ctx = MF->getFunction()->getContext();
     Ctx.emitError("SIInstrInfo::storeRegToStackSlot - Do not know how to"
                   " spill register");
-    BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), AMDGPU::VGPR0)
+    BuildMI(MBB, MI, DL, get(AMDGPU::KILL))
             .addReg(SrcReg);
   }
 }
@@ -535,8 +535,7 @@ void SIInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
     LLVMContext &Ctx = MF->getFunction()->getContext();
     Ctx.emitError("SIInstrInfo::loadRegFromStackSlot - Do not know how to"
                   " restore register");
-    BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
-            .addReg(AMDGPU::VGPR0);
+    BuildMI(MBB, MI, DL, get(AMDGPU::IMPLICIT_DEF), DestReg);
   }
 }