From: Nadav Rotem <nadav.rotem@intel.com>
Date: Thu, 11 Aug 2011 17:05:47 +0000 (+0000)
Subject: Add a comment, per Bruno's CR.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=6236f7f2b66cecdfe18c7c9b77b59cb922617f3f;p=oota-llvm.git

Add a comment, per Bruno's CR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137313 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 94faae5b556..666ce3c07e9 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -12593,6 +12593,9 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
 
   // If we are saving a concatination of two XMM registers, perform two stores.
+  // This is better in Sandy Bridge cause one 256-bit mem op is done via two
+  // 128-bit ones. If in the future the cost becomes only one memory access the
+  // first version would be better.
   if (VT.getSizeInBits() == 256 &&
     StoredVal.getNode()->getOpcode() == ISD::CONCAT_VECTORS &&
     StoredVal.getNumOperands() == 2) {