From: Craig Topper Date: Tue, 2 Jun 2015 04:15:57 +0000 (+0000) Subject: [TableGen] Rename ListInit::getSize to just 'size' to be more consistent. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=61f49542d7ca5a3fb6f752c88ba7eaf3fbffbaeb;p=oota-llvm.git [TableGen] Rename ListInit::getSize to just 'size' to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238806 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/TableGen/Record.h b/include/llvm/TableGen/Record.h index eada90d1573..d775ddc3cba 100644 --- a/include/llvm/TableGen/Record.h +++ b/include/llvm/TableGen/Record.h @@ -603,7 +603,6 @@ public: void Profile(FoldingSetNodeID &ID) const; - unsigned getSize() const { return Values.size(); } Init *getElement(unsigned i) const { assert(i < Values.size() && "List element index out of range!"); return Values[i]; @@ -627,10 +626,11 @@ public: ArrayRef getValues() const { return Values; } - inline const_iterator begin() const { return Values.begin(); } - inline const_iterator end () const { return Values.end(); } + const_iterator begin() const { return Values.begin(); } + const_iterator end () const { return Values.end(); } - inline bool empty() const { return Values.empty(); } + size_t size () const { return Values.size(); } + bool empty() const { return Values.empty(); } /// resolveListElementReference - This method is used to implement /// VarListElementInit::resolveReferences. If the list element is resolvable diff --git a/lib/TableGen/Record.cpp b/lib/TableGen/Record.cpp index 02c54aaec93..4ca3e8d34c9 100644 --- a/lib/TableGen/Record.cpp +++ b/lib/TableGen/Record.cpp @@ -521,7 +521,7 @@ Init * ListInit::convertInitListSlice(const std::vector &Elements) const { std::vector Vals; for (unsigned i = 0, e = Elements.size(); i != e; ++i) { - if (Elements[i] >= getSize()) + if (Elements[i] >= size()) return nullptr; Vals.push_back(getElement(Elements[i])); } @@ -538,7 +538,7 @@ Record *ListInit::getElementAsRecord(unsigned i) const { Init *ListInit::resolveReferences(Record &R, const RecordVal *RV) const { std::vector Resolved; - Resolved.reserve(getSize()); + Resolved.reserve(size()); bool Changed = false; for (Init *CurElt : getValues()) { @@ -559,7 +559,7 @@ Init *ListInit::resolveReferences(Record &R, const RecordVal *RV) const { Init *ListInit::resolveListElementReference(Record &R, const RecordVal *IRV, unsigned Elt) const { - if (Elt >= getSize()) + if (Elt >= size()) return nullptr; // Out of range reference. Init *E = getElement(Elt); // If the element is set to some value, or if we are resolving a reference @@ -1243,7 +1243,7 @@ Init *VarInit::resolveListElementReference(Record &R, if (!LI) return VarListElementInit::get(cast(RV->getValue()), Elt); - if (Elt >= LI->getSize()) + if (Elt >= LI->size()) return nullptr; // Out of range reference. Init *E = LI->getElement(Elt); // If the element is set to some value, or if we are resolving a reference @@ -1412,7 +1412,7 @@ Init *FieldInit::resolveListElementReference(Record &R, const RecordVal *RV, unsigned Elt) const { if (Init *ListVal = Rec->getFieldInit(R, RV, FieldName)) if (ListInit *LI = dyn_cast(ListVal)) { - if (Elt >= LI->getSize()) return nullptr; + if (Elt >= LI->size()) return nullptr; Init *E = LI->getElement(Elt); // If the element is set to some value, or if we are resolving a diff --git a/lib/TableGen/TGParser.cpp b/lib/TableGen/TGParser.cpp index 66d8555628d..66fc0ac1ebe 100644 --- a/lib/TableGen/TGParser.cpp +++ b/lib/TableGen/TGParser.cpp @@ -309,7 +309,7 @@ bool TGParser::ProcessForeachDefs(Record *CurRec, SMLoc Loc, IterSet &IterVals){ } // Process each value. - for (int64_t i = 0; i < List->getSize(); ++i) { + for (unsigned i = 0; i < List->size(); ++i) { Init *ItemVal = List->resolveListElementReference(*CurRec, nullptr, i); IterVals.push_back(IterRecord(CurLoop.IterVar, ItemVal)); if (ProcessForeachDefs(CurRec, Loc, IterVals)) diff --git a/utils/TableGen/CallingConvEmitter.cpp b/utils/TableGen/CallingConvEmitter.cpp index 051a7e98141..c7519b3e152 100644 --- a/utils/TableGen/CallingConvEmitter.cpp +++ b/utils/TableGen/CallingConvEmitter.cpp @@ -69,7 +69,7 @@ void CallingConvEmitter::EmitCallingConv(Record *CC, raw_ostream &O) { << std::string(CC->getName().size()+13, ' ') << "ISD::ArgFlagsTy ArgFlags, CCState &State) {\n"; // Emit all of the actions, in order. - for (unsigned i = 0, e = CCActions->getSize(); i != e; ++i) { + for (unsigned i = 0, e = CCActions->size(); i != e; ++i) { O << "\n"; EmitAction(CCActions->getElementAsRecord(i), 2, O); } @@ -87,7 +87,7 @@ void CallingConvEmitter::EmitAction(Record *Action, if (Action->isSubClassOf("CCIfType")) { ListInit *VTs = Action->getValueAsListInit("VTs"); - for (unsigned i = 0, e = VTs->getSize(); i != e; ++i) { + for (unsigned i = 0, e = VTs->size(); i != e; ++i) { Record *VT = VTs->getElementAsRecord(i); if (i != 0) O << " ||\n " << IndentStr; O << "LocVT == " << getEnumName(getValueType(VT)); @@ -111,14 +111,14 @@ void CallingConvEmitter::EmitAction(Record *Action, << IndentStr << " return false;\n"; } else if (Action->isSubClassOf("CCAssignToReg")) { ListInit *RegList = Action->getValueAsListInit("RegList"); - if (RegList->getSize() == 1) { + if (RegList->size() == 1) { O << IndentStr << "if (unsigned Reg = State.AllocateReg("; O << getQualifiedName(RegList->getElementAsRecord(0)) << ")) {\n"; } else { O << IndentStr << "static const MCPhysReg RegList" << ++Counter << "[] = {\n"; O << IndentStr << " "; - for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = RegList->size(); i != e; ++i) { if (i != 0) O << ", "; O << getQualifiedName(RegList->getElementAsRecord(i)); } @@ -133,11 +133,10 @@ void CallingConvEmitter::EmitAction(Record *Action, } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) { ListInit *RegList = Action->getValueAsListInit("RegList"); ListInit *ShadowRegList = Action->getValueAsListInit("ShadowRegList"); - if (ShadowRegList->getSize() >0 && - ShadowRegList->getSize() != RegList->getSize()) + if (!ShadowRegList->empty() && ShadowRegList->size() != RegList->size()) PrintFatalError("Invalid length of list of shadowed registers"); - if (RegList->getSize() == 1) { + if (RegList->size() == 1) { O << IndentStr << "if (unsigned Reg = State.AllocateReg("; O << getQualifiedName(RegList->getElementAsRecord(0)); O << ", " << getQualifiedName(ShadowRegList->getElementAsRecord(0)); @@ -149,7 +148,7 @@ void CallingConvEmitter::EmitAction(Record *Action, O << IndentStr << "static const MCPhysReg RegList" << RegListNumber << "[] = {\n"; O << IndentStr << " "; - for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = RegList->size(); i != e; ++i) { if (i != 0) O << ", "; O << getQualifiedName(RegList->getElementAsRecord(i)); } @@ -158,7 +157,7 @@ void CallingConvEmitter::EmitAction(Record *Action, O << IndentStr << "static const MCPhysReg RegList" << ShadowRegListNumber << "[] = {\n"; O << IndentStr << " "; - for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i) { if (i != 0) O << ", "; O << getQualifiedName(ShadowRegList->getElementAsRecord(i)); } @@ -206,7 +205,7 @@ void CallingConvEmitter::EmitAction(Record *Action, O << IndentStr << "static const MCPhysReg ShadowRegList" << ShadowRegListNumber << "[] = {\n"; O << IndentStr << " "; - for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i) { if (i != 0) O << ", "; O << getQualifiedName(ShadowRegList->getElementAsRecord(i)); } diff --git a/utils/TableGen/CodeGenMapTable.cpp b/utils/TableGen/CodeGenMapTable.cpp index 00c0b2e238d..48df4391fe1 100644 --- a/utils/TableGen/CodeGenMapTable.cpp +++ b/utils/TableGen/CodeGenMapTable.cpp @@ -137,7 +137,7 @@ public: // Make sure that all the sub-lists in 'ValueCols' have same number of // elements as the fields in 'ColFields'. - if (ColI->getSize() != ColFields->getSize()) + if (ColI->size() != ColFields->size()) PrintFatalError(MapRec->getLoc(), "Record `" + MapRec->getName() + "', field `ValueCols' entries don't match with " + " the entries in 'ColFields'!"); @@ -267,7 +267,7 @@ bool MapTableEmitter::isKeyColInstr(Record* CurInstr) { // Check if the instruction is a KeyCol instruction. bool MatchFound = true; - for (unsigned j = 0, endCF = ColFields->getSize(); + for (unsigned j = 0, endCF = ColFields->size(); (j < endCF) && MatchFound; j++) { RecordVal *ColFieldName = CurInstr->getValue(ColFields->getElement(j)); std::string CurInstrVal = ColFieldName->getValue()->getAsUnquotedString(); @@ -327,7 +327,7 @@ Record *MapTableEmitter::getInstrForColumn(Record *KeyInstr, for (unsigned i = 0, e = RelatedInstrVec.size(); i < e; i++) { bool MatchFound = true; Record *CurInstr = RelatedInstrVec[i]; - for (unsigned j = 0, endCF = ColFields->getSize(); + for (unsigned j = 0, endCF = ColFields->size(); (j < endCF) && MatchFound; j++) { Init *ColFieldJ = ColFields->getElement(j); Init *CurInstrInit = CurInstr->getValue(ColFieldJ)->getValue(); @@ -439,12 +439,12 @@ void MapTableEmitter::emitMapFuncBody(raw_ostream &OS, if (ValueCols.size() > 1) { for (unsigned i = 0, e = ValueCols.size(); i < e; i++) { ListInit *ColumnI = ValueCols[i]; - for (unsigned j = 0, ColSize = ColumnI->getSize(); j < ColSize; j++) { + for (unsigned j = 0, ColSize = ColumnI->size(); j < ColSize; ++j) { std::string ColName = ColFields->getElement(j)->getAsUnquotedString(); OS << " if (in" << ColName; OS << " == "; OS << ColName << "_" << ColumnI->getElement(j)->getAsUnquotedString(); - if (j < ColumnI->getSize() - 1) OS << " && "; + if (j < ColumnI->size() - 1) OS << " && "; else OS << ")\n"; } OS << " return " << InstrMapDesc.getName(); @@ -505,18 +505,18 @@ static void emitEnums(raw_ostream &OS, RecordKeeper &Records) { ColFields = CurMap->getValueAsListInit("ColFields"); ListInit *List = CurMap->getValueAsListInit("ValueCols"); std::vector ValueCols; - unsigned ListSize = List->getSize(); + unsigned ListSize = List->size(); for (unsigned j = 0; j < ListSize; j++) { ListInit *ListJ = dyn_cast(List->getElement(j)); - if (ListJ->getSize() != ColFields->getSize()) + if (ListJ->size() != ColFields->size()) PrintFatalError("Record `" + CurMap->getName() + "', field " "`ValueCols' entries don't match with the entries in 'ColFields' !"); ValueCols.push_back(ListJ); } - for (unsigned j = 0, endCF = ColFields->getSize(); j < endCF; j++) { + for (unsigned j = 0, endCF = ColFields->size(); j < endCF; j++) { for (unsigned k = 0; k < ListSize; k++){ std::string ColName = ColFields->getElement(j)->getAsUnquotedString(); ColFieldValueMap[ColName].push_back((ValueCols[k])->getElement(j)); diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index f20e5b36fd0..c9e6d1d379d 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -543,7 +543,7 @@ struct TupleExpander : SetTheory::Expander { std::vector Indices = Def->getValueAsListOfDefs("SubRegIndices"); unsigned Dim = Indices.size(); ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); - if (Dim != SubRegs->getSize()) + if (Dim != SubRegs->size()) PrintFatalError(Def->getLoc(), "SubRegIndices and SubRegs size mismatch"); if (Dim < 2) PrintFatalError(Def->getLoc(), @@ -676,7 +676,7 @@ CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) // Allocation order 0 is the full set. AltOrders provides others. const SetTheory::RecVec *Elements = RegBank.getSets().expand(R); ListInit *AltOrders = R->getValueAsListInit("AltOrders"); - Orders.resize(1 + AltOrders->getSize()); + Orders.resize(1 + AltOrders->size()); // Default allocation order always contains all registers. for (unsigned i = 0, e = Elements->size(); i != e; ++i) { @@ -689,7 +689,7 @@ CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) // Alternative allocation orders may be subsets. SetTheory::RecSet Order; - for (unsigned i = 0, e = AltOrders->getSize(); i != e; ++i) { + for (unsigned i = 0, e = AltOrders->size(); i != e; ++i) { RegBank.getSets().evaluate(AltOrders->getElement(i), Order, R->getLoc()); Orders[1 + i].append(Order.begin(), Order.end()); // Verify that all altorder members are regclass members. diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 076537002a6..e79a809b6d1 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -486,7 +486,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the list of return types. std::vector OverloadedVTs; ListInit *TypeList = R->getValueAsListInit("RetTypes"); - for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { Record *TyEl = TypeList->getElementAsRecord(i); assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); MVT::SimpleValueType VT; @@ -520,7 +520,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the list of parameter types. TypeList = R->getValueAsListInit("ParamTypes"); - for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { Record *TyEl = TypeList->getElementAsRecord(i); assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); MVT::SimpleValueType VT; @@ -556,7 +556,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // Parse the intrinsic properties. ListInit *PropList = R->getValueAsListInit("Properties"); - for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { + for (unsigned i = 0, e = PropList->size(); i != e; ++i) { Record *Property = PropList->getElementAsRecord(i); assert(Property->isSubClassOf("IntrinsicProperty") && "Expected a property!"); diff --git a/utils/TableGen/FixedLenDecoderEmitter.cpp b/utils/TableGen/FixedLenDecoderEmitter.cpp index 1ec2dd9b3f9..36a2183fc8b 100644 --- a/utils/TableGen/FixedLenDecoderEmitter.cpp +++ b/utils/TableGen/FixedLenDecoderEmitter.cpp @@ -1113,7 +1113,7 @@ bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation, ListInit *Predicates = AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); bool IsFirstEmission = true; - for (unsigned i = 0; i < Predicates->getSize(); ++i) { + for (unsigned i = 0; i < Predicates->size(); ++i) { Record *Pred = Predicates->getElementAsRecord(i); if (!Pred->getValue("AssemblerMatcherPredicate")) continue; @@ -1136,13 +1136,13 @@ bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation, emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace); IsFirstEmission = false; } - return Predicates->getSize() > 0; + return !Predicates->empty(); } bool FilterChooser::doesOpcodeNeedPredicate(unsigned Opc) const { ListInit *Predicates = AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates"); - for (unsigned i = 0; i < Predicates->getSize(); ++i) { + for (unsigned i = 0; i < Predicates->size(); ++i) { Record *Pred = Predicates->getElementAsRecord(i); if (!Pred->getValue("AssemblerMatcherPredicate")) continue;