From: Bob Wilson <bob.wilson@apple.com>
Date: Tue, 29 Jun 2010 00:26:13 +0000 (+0000)
Subject: Fix Thumb encoding of VMOV (scalar to ARM core register).  The encoding is
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=5cdede43e92a370130fddde2ff071c74ea463448;p=oota-llvm.git

Fix Thumb encoding of VMOV (scalar to ARM core register).  The encoding is
the same as ARM except that the condition code field is always set to ARMCC::AL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107107 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 048529b18c4..f26074d358a 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -1600,7 +1600,7 @@ void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) {
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
+  Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift;
 
   unsigned RegT = MI.getOperand(0).getReg();
   RegT = ARMRegisterInfo::getRegisterNumbering(RegT);