From: Jakob Stoklund Olesen <stoklund@2pi.dk>
Date: Sun, 20 May 2012 18:43:00 +0000 (+0000)
Subject: Make the global base reg GR32_NOSP.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=53df9259e94a9d6b99348ecf9683cdec7bf94bc8;p=oota-llvm.git

Make the global base reg GR32_NOSP.

It can sometimes be used in addressing modes that don't support %ESP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 5a5ba2fd2d2..d8fd9064f3d 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -3627,7 +3627,7 @@ unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
   // Create the register. The code to initialize it is inserted
   // later, by the CGBR pass (below).
   MachineRegisterInfo &RegInfo = MF->getRegInfo();
-  GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32RegClass);
+  GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);
   X86FI->setGlobalBaseReg(GlobalBaseReg);
   return GlobalBaseReg;
 }