From: Chris Lattner <sabre@nondot.org>
Date: Sat, 2 Nov 2002 19:45:49 +0000 (+0000)
Subject: Add PHI node support, add comment for branch function
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=51b49a963305db469152ec2cbcee7de53f31f391;p=oota-llvm.git

Add PHI node support, add comment for branch function


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4500 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 253f3ddcb04..106d99b19dc 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -9,6 +9,7 @@
 #include "llvm/Function.h"
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
+#include "llvm/iPHINode.h"
 #include "llvm/Type.h"
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
@@ -54,6 +55,7 @@ namespace {
     // Visitation methods for various instructions.  These methods simply emit
     // fixed X86 code for each instruction.
     //
+    void visitPHINode(PHINode &I);
     void visitReturnInst(ReturnInst &RI);
     void visitBranchInst(BranchInst &BI);
     void visitAdd(BinaryOperator &B);
@@ -140,6 +142,20 @@ void ISel::copyConstantToRegister(Constant *C, unsigned R) {
   }
 }
 
+/// visitPHINode - Turn an LLVM PHI node into an X86 PHI node...
+///
+void ISel::visitPHINode(PHINode &PN) {
+  MachineInstr *MI = BuildMI(BB, X86::PHI, PN.getNumOperands(), getReg(PN));
+
+  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
+    // FIXME: This will put constants after the PHI nodes in the block, which
+    // is invalid.  They should be put inline into the PHI node eventually.
+    //
+    MI->addRegOperand(getReg(PN.getIncomingValue(i)));
+    MI->addPCDispOperand(PN.getIncomingBlock(i));
+  }
+}
+
 
 /// 'ret' instruction - Here we are interested in meeting the x86 ABI.  As such,
 /// we have the following possibilities:
@@ -163,6 +179,11 @@ void ISel::visitReturnInst(ReturnInst &I) {
   BuildMI(BB, X86::RET, 0);
 }
 
+/// visitBranchInst - Handle conditional and unconditional branches here.  Note
+/// that since code layout is frozen at this point, that if we are trying to
+/// jump to a block that is the immediate successor of the current block, we can
+/// just make a fall-through. (but we don't currently).
+///
 void ISel::visitBranchInst(BranchInst &BI) {
   if (BI.isConditional())   // Only handles unconditional branches so far...
     visitInstruction(BI);
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 253f3ddcb04..106d99b19dc 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -9,6 +9,7 @@
 #include "llvm/Function.h"
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
+#include "llvm/iPHINode.h"
 #include "llvm/Type.h"
 #include "llvm/Constants.h"
 #include "llvm/Pass.h"
@@ -54,6 +55,7 @@ namespace {
     // Visitation methods for various instructions.  These methods simply emit
     // fixed X86 code for each instruction.
     //
+    void visitPHINode(PHINode &I);
     void visitReturnInst(ReturnInst &RI);
     void visitBranchInst(BranchInst &BI);
     void visitAdd(BinaryOperator &B);
@@ -140,6 +142,20 @@ void ISel::copyConstantToRegister(Constant *C, unsigned R) {
   }
 }
 
+/// visitPHINode - Turn an LLVM PHI node into an X86 PHI node...
+///
+void ISel::visitPHINode(PHINode &PN) {
+  MachineInstr *MI = BuildMI(BB, X86::PHI, PN.getNumOperands(), getReg(PN));
+
+  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
+    // FIXME: This will put constants after the PHI nodes in the block, which
+    // is invalid.  They should be put inline into the PHI node eventually.
+    //
+    MI->addRegOperand(getReg(PN.getIncomingValue(i)));
+    MI->addPCDispOperand(PN.getIncomingBlock(i));
+  }
+}
+
 
 /// 'ret' instruction - Here we are interested in meeting the x86 ABI.  As such,
 /// we have the following possibilities:
@@ -163,6 +179,11 @@ void ISel::visitReturnInst(ReturnInst &I) {
   BuildMI(BB, X86::RET, 0);
 }
 
+/// visitBranchInst - Handle conditional and unconditional branches here.  Note
+/// that since code layout is frozen at this point, that if we are trying to
+/// jump to a block that is the immediate successor of the current block, we can
+/// just make a fall-through. (but we don't currently).
+///
 void ISel::visitBranchInst(BranchInst &BI) {
   if (BI.isConditional())   // Only handles unconditional branches so far...
     visitInstruction(BI);