From: Huang, Tao <huangtao@rock-chips.com>
Date: Wed, 8 Mar 2017 10:32:18 +0000 (+0800)
Subject: arm64: dts: rockchip: reorder some nodes for rk3399
X-Git-Tag: firefly_0821_release~393
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=507fc2f4ff8090ca59019d2ed310a6929a8e823a;p=firefly-linux-kernel-4.4.55.git

arm64: dts: rockchip: reorder some nodes for rk3399

keep order as upstream.

Change-Id: I52e0dfe97f0d12c550603675085a66346529794d
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index df9f1c7d7c5f..1b61b3372d14 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -76,11 +76,6 @@
 		serial4 = &uart4;
 	};
 
-	psci {
-		compatible = "arm,psci-1.0";
-		method = "smc";
-	};
-
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -217,29 +212,34 @@
 		};
 	};
 
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
-			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
-			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
-			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
-	};
-
 	pmu_a53 {
 		compatible = "arm,cortex-a53-pmu";
-		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part0>;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
 	};
 
 	pmu_a72 {
 		compatible = "arm,cortex-a72-pmu";
-		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &part1>;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
 	};
 
 	xin24m: xin24m {
 		compatible = "fixed-clock";
-		#clock-cells = <0>;
 		clock-frequency = <24000000>;
 		clock-output-names = "xin24m";
+		#clock-cells = <0>;
 	};
 
 	amba {
@@ -509,11 +509,11 @@
 		};
 
 		ppi-partitions {
-			part0: interrupt-partition-0 {
+			ppi_cluster0: interrupt-partition-0 {
 				affinity = <&cpu_l0 &cpu_l1 &cpu_l2 &cpu_l3>;
 			};
 
-			part1: interrupt-partition-1 {
+			ppi_cluster1: interrupt-partition-1 {
 				affinity = <&cpu_b0 &cpu_b1>;
 			};
 		};