From: Bob Wilson <bob.wilson@apple.com>
Date: Sun, 17 Jan 2010 05:58:23 +0000 (+0000)
Subject: Fix an off-by-one error that caused the chain operand to be dropped from Neon
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=507d32aad2152a9b889df085feca2f653925456c;p=oota-llvm.git

Fix an off-by-one error that caused the chain operand to be dropped from Neon
vector load-lane and store-lane instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93673 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 14a45b3ab45..a260050cf36 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1296,12 +1296,12 @@ SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,
   Ops.push_back(Chain);
 
   if (!IsLoad)
-    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), NumVecs+7);
+    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), NumVecs+8);
 
   std::vector<EVT> ResTys(NumVecs, RegVT);
   ResTys.push_back(MVT::Other);
   SDNode *VLdLn =
-    CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), NumVecs+7);
+    CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), NumVecs+8);
   // For a 64-bit vector load to D registers, nothing more needs to be done.
   if (is64BitVector)
     return VLdLn;