From: Chris Lattner <sabre@nondot.org>
Date: Fri, 12 Feb 2010 23:24:09 +0000 (+0000)
Subject: implement the rest of correct x86-64 encoder support for
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=4a2e5edb94c5d6ceb2f8f99ec031963e4c3862f9;p=oota-llvm.git

implement the rest of correct x86-64 encoder support for
rip-relative addresses, and add a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 0e3d01470db..c31447f7d58 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -15,6 +15,7 @@
 #include "X86.h"
 #include "X86InstrInfo.h"
 #include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
@@ -36,10 +37,11 @@ class X86MCCodeEmitter : public MCCodeEmitter {
   void operator=(const X86MCCodeEmitter &); // DO NOT IMPLEMENT
   const TargetMachine &TM;
   const TargetInstrInfo &TII;
+  MCContext &Ctx;
   bool Is64BitMode;
 public:
-  X86MCCodeEmitter(TargetMachine &tm, bool is64Bit) 
-    : TM(tm), TII(*TM.getInstrInfo()) {
+  X86MCCodeEmitter(TargetMachine &tm, MCContext &ctx, bool is64Bit) 
+    : TM(tm), TII(*TM.getInstrInfo()), Ctx(ctx) {
     Is64BitMode = is64Bit;
   }
 
@@ -122,13 +124,13 @@ public:
 MCCodeEmitter *llvm::createX86_32MCCodeEmitter(const Target &,
                                                TargetMachine &TM,
                                                MCContext &Ctx) {
-  return new X86MCCodeEmitter(TM, false);
+  return new X86MCCodeEmitter(TM, Ctx, false);
 }
 
 MCCodeEmitter *llvm::createX86_64MCCodeEmitter(const Target &,
                                                TargetMachine &TM,
                                                MCContext &Ctx) {
-  return new X86MCCodeEmitter(TM, true);
+  return new X86MCCodeEmitter(TM, Ctx, true);
 }
 
 
@@ -167,7 +169,9 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind,
 
   // If we have an immoffset, add it to the expression.
   const MCExpr *Expr = DispOp.getExpr();
-  // FIXME: NO CONTEXT.
+  if (ImmOffset)
+    Expr = MCBinaryExpr::CreateAdd(Expr,MCConstantExpr::Create(ImmOffset, Ctx),
+                                   Ctx);
   
   // Emit a symbolic constant as a fixup and 4 zeros.
   Fixups.push_back(MCFixup::Create(CurByte, Expr, FixupKind));
diff --git a/test/MC/AsmParser/X86/x86_64-new-encoder.s b/test/MC/AsmParser/X86/x86_64-new-encoder.s
new file mode 100644
index 00000000000..cdbac1e53b5
--- /dev/null
+++ b/test/MC/AsmParser/X86/x86_64-new-encoder.s
@@ -0,0 +1,30 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding --enable-new-x86-encoder %s | FileCheck %s
+
+movl	foo(%rip), %eax
+// CHECK: movl	foo(%rip), %eax
+// CHECK: encoding: [0x8b,0x05,A,A,A,A]
+// CHECK: fixup A - offset: 2, value: foo, kind: reloc_riprel_4byte
+
+movb	$12, foo(%rip)
+// CHECK: movb	$12, foo(%rip)
+// CHECK: encoding: [0xc6,0x05,A,A,A,A,B]
+// CHECK:    fixup A - offset: 2, value: foo-1, kind: reloc_riprel_4byte
+// CHECK:    fixup B - offset: 6, value: 12, kind: FK_Data_1
+
+movw	$12, foo(%rip)
+// CHECK: movw	$12, foo(%rip)
+// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,B,B]
+// CHECK:    fixup A - offset: 3, value: foo-2, kind: reloc_riprel_4byte
+// CHECK:    fixup B - offset: 7, value: 12, kind: FK_Data_2
+
+movl	$12, foo(%rip)
+// CHECK: movl	$12, foo(%rip)
+// CHECK: encoding: [0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK:    fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte
+// CHECK:    fixup B - offset: 6, value: 12, kind: FK_Data_4
+
+movq	$12, foo(%rip)
+// CHECK:  movq	$12, foo(%rip)
+// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK:    fixup A - offset: 3, value: foo-4, kind: reloc_riprel_4byte
+// CHECK:    fixup B - offset: 7, value: 12, kind: FK_Data_4