From: Eric Christopher Date: Tue, 8 Jun 2010 22:57:33 +0000 (+0000) Subject: Split out these asserts so it's more apparent why we're not assembling X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=497f1eb2b89721e81b65237df90d23cb60de16b0;p=oota-llvm.git Split out these asserts so it's more apparent why we're not assembling that rip-relative address when executing in 32-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105656 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index f97ac2fe482..d105b5d2a5f 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -202,8 +202,8 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op, // Handle %rip relative addressing. if (BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode - assert(IndexReg.getReg() == 0 && Is64BitMode && - "Invalid rip-relative address"); + assert(Is64BitMode && "Rip-relative addressing requires 64-bit mode"); + assert(IndexReg.getReg() == 0 && "Invalid rip-relative address"); EmitByte(ModRMByte(0, RegOpcodeField, 5), CurByte, OS); unsigned FixupKind = X86::reloc_riprel_4byte;