From: Chris Lattner <sabre@nondot.org>
Date: Thu, 21 Nov 2002 21:04:50 +0000 (+0000)
Subject: Minor code cleanups
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=47b4a9b2e07e37f24f02dd31737def405452abf1;p=oota-llvm.git

Minor code cleanups


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index d7512691542..3c858534582 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -295,7 +295,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
   const MachineInstrDescriptor &Desc = get(Opcode);
 
   // Print instruction prefixes if neccesary
-  
   if (Desc.TSFlags & X86II::OpSize) O << "66 "; // Operand size...
   if (Desc.TSFlags & X86II::TB) O << "0F ";     // Two-byte opcode prefix
 
@@ -304,6 +303,7 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     O << "\t\t\t";
     O << "-"; MI->print(O, TM);
     break;
+
   case X86II::RawFrm:
     toHex(O, getBaseOpcodeFor(Opcode));
     O << "\n\t\t\t\t";
@@ -316,7 +316,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     O << "\n";
     return;
 
-
   case X86II::AddRegFrm: {
     // There are currently two forms of acceptable AddRegFrm instructions.
     // Either the instruction JUST takes a single register (like inc, dec, etc),
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index d7512691542..3c858534582 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -295,7 +295,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
   const MachineInstrDescriptor &Desc = get(Opcode);
 
   // Print instruction prefixes if neccesary
-  
   if (Desc.TSFlags & X86II::OpSize) O << "66 "; // Operand size...
   if (Desc.TSFlags & X86II::TB) O << "0F ";     // Two-byte opcode prefix
 
@@ -304,6 +303,7 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     O << "\t\t\t";
     O << "-"; MI->print(O, TM);
     break;
+
   case X86II::RawFrm:
     toHex(O, getBaseOpcodeFor(Opcode));
     O << "\n\t\t\t\t";
@@ -316,7 +316,6 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
     O << "\n";
     return;
 
-
   case X86II::AddRegFrm: {
     // There are currently two forms of acceptable AddRegFrm instructions.
     // Either the instruction JUST takes a single register (like inc, dec, etc),