From: Evan Cheng Date: Mon, 17 May 2010 21:54:50 +0000 (+0000) Subject: vmov of immediates are trivially re-materializable. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=47006be498e256cc8c356a2325c918b825ab2ab7;p=oota-llvm.git vmov of immediates are trivially re-materializable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103982 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index c87d7b45564..bd6ffc0dcaa 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -2862,6 +2862,7 @@ def vmovImm64 : PatLeaf<(build_vector), [{ // Note: Some of the cmode bits in the following VMOV instructions need to // be encoded based on the immed values. +let isReMaterializable = 1 in { def VMOVv8i8 : N1ModImm<1, 0b000, 0b1110, 0, 0, 0, 1, (outs DPR:$dst), (ins h8imm:$SIMM), IIC_VMOVImm, "vmov", "i8", "$dst, $SIMM", "", @@ -2897,6 +2898,7 @@ def VMOVv2i64 : N1ModImm<1, 0b000, 0b1110, 0, 1, 1, 1, (outs QPR:$dst), (ins h64imm:$SIMM), IIC_VMOVImm, "vmov", "i64", "$dst, $SIMM", "", [(set QPR:$dst, (v2i64 vmovImm64:$SIMM))]>; +} // isReMaterializable // VMOV : Vector Get Lane (move scalar to ARM core register)