From: Shih-wei Liao <sliao@google.com>
Date: Wed, 26 May 2010 03:21:39 +0000 (+0000)
Subject: Adding the missing implementation for ARM::SBFX and ARM::UBFX.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=45469f38b602c8f10ea37dec8d0a4dbb725cf101;p=oota-llvm.git

Adding the missing implementation for ARM::SBFX and ARM::UBFX.
Fixing http://llvm.org/bugs/show_bug.cgi?id=7225.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104667 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 66c8032ef05..59cb54130a7 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -820,11 +820,23 @@ void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
       uint32_t v = ~MI.getOperand(2).getImm();
       int32_t lsb = CountTrailingZeros_32(v);
       int32_t msb = (32 - CountLeadingZeros_32(v)) - 1;
-      // Insts[20-16] = msb, Insts[11-7] = lsb
+      // Instr{20-16} = msb, Instr{11-7} = lsb
       Binary |= (msb & 0x1F) << 16;
       Binary |= (lsb & 0x1F) << 7;
       emitWordLE(Binary);
       return;
+  } else if ((TID.Opcode == ARM::UBFX) || (TID.Opcode == ARM::SBFX)) {
+      // Encode Rn in Instr{0-3}
+      Binary |= getMachineOpValue(MI, OpIdx++);
+
+      uint32_t lsb = MI.getOperand(OpIdx++).getImm();
+      uint32_t widthm1 = MI.getOperand(OpIdx++).getImm() - 1;
+
+      // Instr{20-16} = widthm1, Instr{11-7} = lsb
+      Binary |= (widthm1 & 0x1F) << 16;
+      Binary |= (lsb & 0x1F) << 7;
+      emitWordLE(Binary);
+      return;
   }
 
   // If this is a two-address operand, skip it. e.g. MOVCCr operand 1.