From: Reid Spencer Date: Mon, 30 Apr 2007 05:11:58 +0000 (+0000) Subject: For PR1370: X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=4274e405148eaac79735d68637f87cf3a048f9d4;p=oota-llvm.git For PR1370: Rearrange some tests so that if PowerPC is not being built we don't try to run PowerPC specific tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36587 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll new file mode 100644 index 00000000000..8dcac30fac8 --- /dev/null +++ b/test/CodeGen/ARM/ispositive.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31} +; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; :0 [#uses=1] + zext i1 %0 to i32 ; :1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll deleted file mode 100644 index a5476eb3b50..00000000000 --- a/test/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi - -void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) { - %X = shl short %div.0.i.i.i.i, ubyte 1 ; [#uses=1] - %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; [#uses=2] - %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; [#uses=2] - - %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; [#uses=1] - %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; [#uses=1] - %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; [#uses=1] - store short %div.0.be.i.i.i.i, short* %P - ret void -} - diff --git a/test/CodeGen/Generic/ispositive.ll b/test/CodeGen/Generic/ispositive.ll deleted file mode 100644 index c158f15cfb8..00000000000 --- a/test/CodeGen/Generic/ispositive.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31} -; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ -; RUN: grep {srwi r3, r3, 31} -; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31} -; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31} - -define i32 @test1(i32 %X) { -entry: - icmp slt i32 %X, 0 ; :0 [#uses=1] - zext i1 %0 to i32 ; :1 [#uses=1] - ret i32 %1 -} - diff --git a/test/CodeGen/Generic/vector-identity-shuffle.ll b/test/CodeGen/Generic/vector-identity-shuffle.ll index 9cccf4b381f..0f7e03b062f 100644 --- a/test/CodeGen/Generic/vector-identity-shuffle.ll +++ b/test/CodeGen/Generic/vector-identity-shuffle.ll @@ -1,5 +1,3 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test: -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm ; RUN: llvm-upgrade < %s | llvm-as | llc void %test(<4 x float> *%tmp2.i) { diff --git a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll new file mode 100644 index 00000000000..a5476eb3b50 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi + +void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) { + %X = shl short %div.0.i.i.i.i, ubyte 1 ; [#uses=1] + %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; [#uses=2] + %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; [#uses=2] + + %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; [#uses=1] + %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; [#uses=1] + %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; [#uses=1] + store short %div.0.be.i.i.i.i, short* %P + ret void +} + diff --git a/test/CodeGen/PowerPC/ispositive.ll b/test/CodeGen/PowerPC/ispositive.ll new file mode 100644 index 00000000000..192d7384e95 --- /dev/null +++ b/test/CodeGen/PowerPC/ispositive.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {srwi r3, r3, 31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; :0 [#uses=1] + zext i1 %0 to i32 ; :1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/PowerPC/vector-identity-shuffle.ll b/test/CodeGen/PowerPC/vector-identity-shuffle.ll new file mode 100644 index 00000000000..af5cc02de0f --- /dev/null +++ b/test/CodeGen/PowerPC/vector-identity-shuffle.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test: +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm + +void %test(<4 x float> *%tmp2.i) { + %tmp2.i = load <4x float>* %tmp2.i + %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; [#uses=1] + %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1] + %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; [#uses=1] + %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1] + %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; [#uses=1] + %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1] + %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; [#uses=1] + %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4] + store <4 x float> %inFloat3.58, <4x float>* %tmp2.i + ret void +} diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll new file mode 100644 index 00000000000..3799b9c70b0 --- /dev/null +++ b/test/CodeGen/X86/ispositive.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; :0 [#uses=1] + zext i1 %0 to i32 ; :1 [#uses=1] + ret i32 %1 +} +