From: wlf <wulf@rock-chips.com>
Date: Wed, 9 Apr 2014 09:04:22 +0000 (+0800)
Subject: USB: add usb soft reset.
X-Git-Tag: firefly_0821_release~5585
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=41aa89bd537f81d4c81f4277e3c36bd3cf88f2c7;p=firefly-linux-kernel-4.4.55.git

USB: add usb soft reset.
---

diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
index 8095bf852472..47c2f48cfc62 100755
--- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c
@@ -1381,8 +1381,13 @@ static int otg20_driver_probe(struct platform_device *_dev)
 	if(pldata->dwc_otg_uart_mode)
 		pldata->dwc_otg_uart_mode(pldata, PHY_USB_MODE);
 
+	/* do reset later, because reset need about
+	 * 100ms to ensure otg id state change.
+	 */
+	/*
 	if(pldata->soft_reset)
 		pldata->soft_reset();
+	*/
 	/*end todo*/
 
 	res_base=platform_get_resource(_dev, IORESOURCE_MEM, 0);
diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
index 443b839339fa..23bc90f0e509 100755
--- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
+++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
@@ -1470,13 +1470,16 @@ static void dwc_phy_reconnect(struct work_struct *work)
 	dwc_otg_core_if_t *core_if;
 	gotgctl_data_t    gctrl;
 	dctl_data_t dctl = {.d32=0};
+	struct dwc_otg_platform_data *pldata;
 
 	pcd = container_of(work, dwc_otg_pcd_t, reconnect.work);
+	pldata = pcd->otg_dev->pldata;
 	core_if = GET_CORE_IF(pcd);
 	gctrl.d32 = DWC_READ_REG32( &core_if->core_global_regs->gotgctl );
 
 	if(gctrl.b.bsesvld){
 		pcd->conn_status++;
+		pldata->soft_reset();
 		dwc_pcd_reset(pcd);
 		/*
 		 * Enable the global interrupt after all the interrupt
diff --git a/drivers/usb/dwc_otg_310/usbdev_rk.h b/drivers/usb/dwc_otg_310/usbdev_rk.h
index 56aa975f61a2..021548a83aaa 100755
--- a/drivers/usb/dwc_otg_310/usbdev_rk.h
+++ b/drivers/usb/dwc_otg_310/usbdev_rk.h
@@ -18,7 +18,7 @@
 #include <linux/workqueue.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-
+#include <linux/rockchip/cru.h>
 
 #include "usbdev_grf_regs.h"
 #include "usbdev_bc.h"
diff --git a/drivers/usb/dwc_otg_310/usbdev_rk32.c b/drivers/usb/dwc_otg_310/usbdev_rk32.c
index be90b9982d29..290e554330b9 100755
--- a/drivers/usb/dwc_otg_310/usbdev_rk32.c
+++ b/drivers/usb/dwc_otg_310/usbdev_rk32.c
@@ -43,6 +43,15 @@ static void usb20otg_phy_suspend(void* pdata, int suspend)
 
 static void usb20otg_soft_reset(void)
 {
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true);
+	udelay(5);
+
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false);
+	mdelay(2);
 }
 
 static void usb20otg_clock_init(void* pdata)
@@ -188,6 +197,15 @@ static void usb20host_phy_suspend(void* pdata, int suspend)
 
 static void usb20host_soft_reset(void)
 {
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true);
+	udelay(5);
+
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false);
+	mdelay(2);
 }
 
 static void usb20host_clock_init(void* pdata)
@@ -370,6 +388,21 @@ static void rk_hsic_clock_enable(void* pdata, int enable)
 
 static void rk_hsic_soft_reset(void)
 {
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true);
+	udelay(5);
+
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false);
+	mdelay(2);
+
+	/* HSIC per-port reset */
+	control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(1<<10);
+	udelay(2);
+	control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(0<<10);
+	udelay(2);
 }
 
 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
@@ -435,7 +468,17 @@ static void rk_ehci_clock_enable(void* pdata, int enable)
 
 static void rk_ehci_soft_reset(void)
 {
-
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true);
+	udelay(5);
+
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false);
+	rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false);
+	mdelay(2);
 }
 
 struct rkehci_platform_data rkehci_pdata_rk3288 = {