From: Fabio Estevam <fabio.estevam@nxp.com>
Date: Mon, 25 Apr 2016 20:37:17 +0000 (-0300)
Subject: ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation
X-Git-Tag: release-20171130_firefly~4^2~100^2~1^2~3^2~44
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=3fc4d70453ee4af1ac539e841e30d973a71edffb;p=firefly-linux-kernel-4.4.55.git

ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation

commit 46350b71a09ccf3573649e03db55d4b61d5da231 upstream.

Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf

states the following:

"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."

So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Cc: Stephane Fillod <f8cfe@free.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 4b0ec0703825..8ca9217204a0 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -30,7 +30,7 @@
 				/* kHz    uV */
 				996000  1250000
 				792000  1175000
-				396000  1075000
+				396000  1150000
 			>;
 			fsl,soc-operating-points = <
 				/* ARM kHz  SOC-PU uV */