From: Anton Korobeynikov <asl@math.spbu.ru>
Date: Wed, 21 Oct 2009 00:12:44 +0000 (+0000)
Subject: Ignore all implicit reg operands
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=3d6e560eef7c31e1f6d1de470f842b91300d5527;p=oota-llvm.git

Ignore all implicit reg operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84708 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.cpp b/lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.cpp
index e9b0c92cf4e..175b6b3f3f7 100644
--- a/lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.cpp
+++ b/lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.cpp
@@ -100,6 +100,8 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
       MI->dump();
       assert(0 && "unknown operand type");
     case MachineOperand::MO_Register:
+      // Ignore all implicit register operands.
+      if (MO.isImplicit()) continue;
       MCOp = MCOperand::CreateReg(MO.getReg());
       break;
     case MachineOperand::MO_Immediate: