From: Richard Osborne Date: Wed, 15 Jul 2009 15:46:56 +0000 (+0000) Subject: Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=3af282f16a5189c864ac3032387b593adfad49fe;p=oota-llvm.git Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75788 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index f6a181e640e..d65495076e4 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -874,44 +874,30 @@ static inline bool isImmUs4(int64_t val) bool XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const { - MVT VT = getValueType(Ty, true); - // Get expected value type after legalization - switch (VT.getSimpleVT()) { - // Legal load / stores - case MVT::i8: - case MVT::i16: - case MVT::i32: - break; - // Expand i1 -> i8 - case MVT::i1: - VT = MVT::i8; - break; - // Everything else is lowered to words - default: - VT = MVT::i32; - break; - } + const TargetData *TD = TM.getTargetData(); + unsigned Size = TD->getTypeAllocSize(Ty); if (AM.BaseGV) { - return VT == MVT::i32 && !AM.HasBaseReg && AM.Scale == 0 && + return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 && AM.BaseOffs%4 == 0; } - switch (VT.getSimpleVT()) { - default: - return false; - case MVT::i8: + switch (Size) { + case 1: // reg + imm if (AM.Scale == 0) { return isImmUs(AM.BaseOffs); } + // reg + reg return AM.Scale == 1 && AM.BaseOffs == 0; - case MVT::i16: + case 2: + case 3: // reg + imm if (AM.Scale == 0) { return isImmUs2(AM.BaseOffs); } + // reg + reg<<1 return AM.Scale == 2 && AM.BaseOffs == 0; - case MVT::i32: + default: // reg + imm if (AM.Scale == 0) { return isImmUs4(AM.BaseOffs); diff --git a/test/CodeGen/XCore/2009-07-15-store192.ll b/test/CodeGen/XCore/2009-07-15-store192.ll new file mode 100644 index 00000000000..874d8dc3d7f --- /dev/null +++ b/test/CodeGen/XCore/2009-07-15-store192.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=xcore > %t1.s +define void @store32(i8* %p) nounwind { +entry: + %0 = bitcast i8* %p to i192* + store i192 0, i192* %0, align 4 + ret void +}