From: Nate Begeman Date: Wed, 30 Nov 2005 18:54:35 +0000 (+0000) Subject: No longer track value types for asm printer operands, and remove them as X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=391c5d231a1d251ea9dc3d8745547c957db94ca4;p=oota-llvm.git No longer track value types for asm printer operands, and remove them as an argument to every operand printing function. Requires some slight tweaks to x86, the only user. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp index 4d70c1d66a7..59b9199b920 100644 --- a/lib/Target/Alpha/AlphaAsmPrinter.cpp +++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp @@ -18,7 +18,6 @@ #include "llvm/Module.h" #include "llvm/Type.h" #include "llvm/Assembly/Writer.h" -#include "llvm/CodeGen/ValueTypes.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/Mangler.h" @@ -54,7 +53,7 @@ namespace { } bool printInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO, bool IsCallOp = false); - void printOperand(const MachineInstr *MI, int opNum, MVT::ValueType VT); + void printOperand(const MachineInstr *MI, int opNum); void printBaseOffsetPair (const MachineInstr *MI, int i, bool brackets=true); void printMachineInstruction(const MachineInstr *MI); bool runOnMachineFunction(MachineFunction &F); @@ -75,7 +74,7 @@ FunctionPass *llvm::createAlphaCodePrinterPass (std::ostream &o, #include "AlphaGenAsmWriter.inc" -void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum, MVT::ValueType VT) +void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum) { const MachineOperand &MO = MI->getOperand(opNum); if (MO.getType() == MachineOperand::MO_MachineRegister) { diff --git a/lib/Target/IA64/IA64AsmPrinter.cpp b/lib/Target/IA64/IA64AsmPrinter.cpp index dbb470ba3c7..c1ee80def4f 100644 --- a/lib/Target/IA64/IA64AsmPrinter.cpp +++ b/lib/Target/IA64/IA64AsmPrinter.cpp @@ -23,7 +23,6 @@ #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/ValueTypes.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/Mangler.h" #include "llvm/ADT/Statistic.h" @@ -65,7 +64,7 @@ namespace { bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ const MachineOperand &MO = MI->getOperand(OpNo); if (MO.getType() == MachineOperand::MO_MachineRegister) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??"); @@ -76,30 +75,25 @@ namespace { } } - void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) { int val=(unsigned int)MI->getOperand(OpNo).getImmedValue(); if(val>=128) val=val-256; // if negative, flip sign O << val; } - void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) { int val=(unsigned int)MI->getOperand(OpNo).getImmedValue(); if(val>=8192) val=val-16384; // if negative, flip sign O << val; } - void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) { int val=(unsigned int)MI->getOperand(OpNo).getImmedValue(); if(val>=2097152) val=val-4194304; // if negative, flip sign O << val; } - void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) { O << (uint64_t)MI->getOperand(OpNo).getImmedValue(); } - void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) { // XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker // errors - instead of add rX = @gprel(CPI), r1;; we now // emit movl rX = @gprel(CPIgetOperand(OpNo), false); // this is NOT a br.call instruction } - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { printOp(MI->getOperand(OpNo), true); // this is a br.call instruction } diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index 6c16cbf7286..e8613f18670 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -27,7 +27,6 @@ #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/ValueTypes.h" #include "llvm/Support/Mangler.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/CommandLine.h" @@ -81,7 +80,7 @@ public: void printMachineInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO); - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ const MachineOperand &MO = MI->getOperand(OpNo); if (MO.getType() == MachineOperand::MO_MachineRegister) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??"); @@ -93,32 +92,26 @@ public: } } - void printU5ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printU5ImmOperand(const MachineInstr *MI, unsigned OpNo) { unsigned char value = MI->getOperand(OpNo).getImmedValue(); assert(value <= 31 && "Invalid u5imm argument!"); O << (unsigned int)value; } - void printU6ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printU6ImmOperand(const MachineInstr *MI, unsigned OpNo) { unsigned char value = MI->getOperand(OpNo).getImmedValue(); assert(value <= 63 && "Invalid u6imm argument!"); O << (unsigned int)value; } - void printS16ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS16ImmOperand(const MachineInstr *MI, unsigned OpNo) { O << (short)MI->getOperand(OpNo).getImmedValue(); } - void printU16ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printU16ImmOperand(const MachineInstr *MI, unsigned OpNo) { O << (unsigned short)MI->getOperand(OpNo).getImmedValue(); } - void printS16X4ImmOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printS16X4ImmOperand(const MachineInstr *MI, unsigned OpNo) { O << (short)MI->getOperand(OpNo).getImmedValue()*4; } - void printBranchOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printBranchOperand(const MachineInstr *MI, unsigned OpNo) { // Branches can take an immediate operand. This is used by the branch // selection pass to print $+8, an eight byte displacement from the PC. if (MI->getOperand(OpNo).isImmediate()) { @@ -127,8 +120,7 @@ public: printOp(MI->getOperand(OpNo)); } } - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { const MachineOperand &MO = MI->getOperand(OpNo); if (!PPCGenerateStaticCode) { if (MO.getType() == MachineOperand::MO_ExternalSymbol) { @@ -149,20 +141,17 @@ public: printOp(MI->getOperand(OpNo)); } - void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo) { O << (int)MI->getOperand(OpNo).getImmedValue()*4; } - void printPICLabel(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printPICLabel(const MachineInstr *MI, unsigned OpNo) { // FIXME: should probably be converted to cout.width and cout.fill O << "\"L0000" << getFunctionNumber() << "$pb\"\n"; O << "\"L0000" << getFunctionNumber() << "$pb\":"; } - void printSymbolHi(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printSymbolHi(const MachineInstr *MI, unsigned OpNo) { if (MI->getOperand(OpNo).isImmediate()) { - printS16ImmOperand(MI, OpNo, VT); + printS16ImmOperand(MI, OpNo); } else { O << "ha16("; printOp(MI->getOperand(OpNo)); @@ -172,10 +161,9 @@ public: O << ')'; } } - void printSymbolLo(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printSymbolLo(const MachineInstr *MI, unsigned OpNo) { if (MI->getOperand(OpNo).isImmediate()) { - printS16ImmOperand(MI, OpNo, VT); + printS16ImmOperand(MI, OpNo); } else { O << "lo16("; printOp(MI->getOperand(OpNo)); @@ -185,8 +173,7 @@ public: O << ')'; } } - void printcrbitm(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printcrbitm(const MachineInstr *MI, unsigned OpNo) { unsigned CCReg = MI->getOperand(OpNo).getReg(); unsigned RegNo = enumRegToMachineReg(CCReg); O << (0x80 >> RegNo); @@ -356,9 +343,9 @@ void PPCAsmPrinter::printMachineInstruction(const MachineInstr *MI) { SH = 32-SH; } if (FoundMnemonic) { - printOperand(MI, 0, MVT::i64); + printOperand(MI, 0); O << ", "; - printOperand(MI, 1, MVT::i64); + printOperand(MI, 1); O << ", " << (unsigned int)SH << "\n"; return; } diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp index b2641073725..73e14a35422 100755 --- a/lib/Target/X86/X86ATTAsmPrinter.cpp +++ b/lib/Target/X86/X86ATTAsmPrinter.cpp @@ -145,8 +145,7 @@ void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) { } } -void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, - MVT::ValueType VT) { +void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) { unsigned char value = MI->getOperand(Op).getImmedValue(); assert(value <= 7 && "Invalid ssecc argument!"); switch (value) { diff --git a/lib/Target/X86/X86ATTAsmPrinter.h b/lib/Target/X86/X86ATTAsmPrinter.h index be5f0ddfbb3..c34fff3f09b 100755 --- a/lib/Target/X86/X86ATTAsmPrinter.h +++ b/lib/Target/X86/X86ATTAsmPrinter.h @@ -35,23 +35,37 @@ struct X86ATTAsmPrinter : public X86SharedAsmPrinter { bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ printOp(MI->getOperand(OpNo)); } - - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix. } - - void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printi8mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } - + void printi16mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printi32mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printi64mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf32mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf64mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf80mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printMachineInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO, bool isCallOperand = false); - void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT); + void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); }; diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 8d61cb58b4f..e679869fe71 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -15,24 +15,24 @@ // *mem - Operand definitions for the funky X86 addressing mode operands. // - -class X86MemOperand : Operand { - let PrintMethod = "printMemoryOperand"; +class X86MemOperand : Operand { + let PrintMethod = printMethod; let NumMIOperands = 4; let MIOperandInfo = (ops R32, i8imm, R32, i32imm); } + +def i8mem : X86MemOperand; +def i16mem : X86MemOperand; +def i32mem : X86MemOperand; +def i64mem : X86MemOperand; +def f32mem : X86MemOperand; +def f64mem : X86MemOperand; +def f80mem : X86MemOperand; + def SSECC : Operand { let PrintMethod = "printSSECC"; } -def i8mem : X86MemOperand; -def i16mem : X86MemOperand; -def i32mem : X86MemOperand; -def i64mem : X86MemOperand; -def f32mem : X86MemOperand; -def f64mem : X86MemOperand; -def f80mem : X86MemOperand; - // A couple of more descriptive operand definitions. // 16-bits but only 8 bits are significant. def i16i8imm : Operand; diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp index b51ef58f048..098a3839c02 100755 --- a/lib/Target/X86/X86IntelAsmPrinter.cpp +++ b/lib/Target/X86/X86IntelAsmPrinter.cpp @@ -59,8 +59,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) { return false; } -void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, - MVT::ValueType VT) { +void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) { unsigned char value = MI->getOperand(Op).getImmedValue(); assert(value <= 7 && "Invalid ssecc argument!"); switch (value) { diff --git a/lib/Target/X86/X86IntelAsmPrinter.h b/lib/Target/X86/X86IntelAsmPrinter.h index 7d81e6b226f..02d38092127 100755 --- a/lib/Target/X86/X86IntelAsmPrinter.h +++ b/lib/Target/X86/X86IntelAsmPrinter.h @@ -37,7 +37,7 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter { bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ const MachineOperand &MO = MI->getOperand(OpNo); if (MO.getType() == MachineOperand::MO_MachineRegister) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??"); @@ -48,29 +48,42 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter { } } - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET". } - void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { - switch (VT) { - default: assert(0 && "Unknown arg size!"); - case MVT::i8: O << "BYTE PTR "; break; - case MVT::i16: O << "WORD PTR "; break; - case MVT::i32: - case MVT::f32: O << "DWORD PTR "; break; - case MVT::i64: - case MVT::f64: O << "QWORD PTR "; break; - case MVT::f80: O << "XWORD PTR "; break; - } + void printi8mem(const MachineInstr *MI, unsigned OpNo) { + O << "BYTE PTR "; + printMemReference(MI, OpNo); + } + void printi16mem(const MachineInstr *MI, unsigned OpNo) { + O << "WORD PTR "; + printMemReference(MI, OpNo); + } + void printi32mem(const MachineInstr *MI, unsigned OpNo) { + O << "WORD PTR "; + printMemReference(MI, OpNo); + } + void printi64mem(const MachineInstr *MI, unsigned OpNo) { + O << "DWORD PTR "; + printMemReference(MI, OpNo); + } + void printf32mem(const MachineInstr *MI, unsigned OpNo) { + O << "DWORD PTR "; + printMemReference(MI, OpNo); + } + void printf64mem(const MachineInstr *MI, unsigned OpNo) { + O << "QWORD PTR "; + printMemReference(MI, OpNo); + } + void printf80mem(const MachineInstr *MI, unsigned OpNo) { + O << "XWORD PTR "; printMemReference(MI, OpNo); } void printMachineInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false); - void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT); + void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); bool doInitialization(Module &M); diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index eeabd8a0891..cc59aa105ad 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -38,21 +38,16 @@ namespace { /// machine instruction. unsigned MIOpNo; - /// OpVT - For isMachineInstrOperand, this is the value type for the - /// operand. - MVT::ValueType OpVT; - AsmWriterOperand(const std::string &LitStr) - : OperandType(isLiteralTextOperand), Str(LitStr) {} + : OperandType(isLiteralTextOperand), Str(LitStr) {} - AsmWriterOperand(const std::string &Printer, unsigned OpNo, - MVT::ValueType VT) : OperandType(isMachineInstrOperand), - Str(Printer), MIOpNo(OpNo), OpVT(VT){} + AsmWriterOperand(const std::string &Printer, unsigned OpNo) + : OperandType(isMachineInstrOperand), Str(Printer), MIOpNo(OpNo) {} bool operator!=(const AsmWriterOperand &Other) const { if (OperandType != Other.OperandType || Str != Other.Str) return true; if (OperandType == isMachineInstrOperand) - return MIOpNo != Other.MIOpNo || OpVT != Other.OpVT; + return MIOpNo != Other.MIOpNo; return false; } bool operator==(const AsmWriterOperand &Other) const { @@ -90,7 +85,7 @@ void AsmWriterOperand::EmitCode(std::ostream &OS) const { if (OperandType == isLiteralTextOperand) OS << "O << \"" << Str << "\"; "; else - OS << Str << "(MI, " << MIOpNo << ", MVT::" << getEnumName(OpVT) << "); "; + OS << Str << "(MI, " << MIOpNo << "); "; } @@ -204,8 +199,7 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) { --MIOp; } - Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, - MIOp, OpInfo.Ty)); + Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, MIOp)); LastEmitted = VarEnd; } }