From: Chandler Carruth <chandlerc@gmail.com>
Date: Sat, 29 Mar 2014 11:07:40 +0000 (+0000)
Subject: [ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it is
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=3734a337e9dc217e929e13e6f66be2be2e77c953;p=oota-llvm.git

[ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it is
no assert at all. ;] Some of these should probably be switched to
llvm_unreachable, but I didn't want to perturb the behavior in this
patch.

Found by -Wstring-conversion, which I'll try to turn on in CMake builds
at least as it is finding useful things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205091 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp
index 39cc5fa6238..4169043aa16 100644
--- a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp
+++ b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp
@@ -1880,7 +1880,7 @@ SDNode *ARM64DAGToDAGISel::Select(SDNode *Node) {
                 .getVectorElementType()
                 .getSizeInBits()) {
     default:
-      assert("Unexpected vector element type!");
+      assert(0 && "Unexpected vector element type!");
     case 64:
       SubReg = ARM64::dsub;
       break;
diff --git a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
index e0757d24dc8..800eaae27e6 100644
--- a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
+++ b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
@@ -230,7 +230,7 @@ getVariant(uint64_t LLVMDisassembler_VariantKind) {
   case LLVMDisassembler_VariantKind_ARM64_TLVP:
   case LLVMDisassembler_VariantKind_ARM64_TLVOFF:
   default:
-    assert("bad LLVMDisassembler_VariantKind");
+    assert(0 && "bad LLVMDisassembler_VariantKind");
     return MCSymbolRefExpr::VK_None;
   }
 }
diff --git a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
index fd4b371db4a..f8da2aa1148 100644
--- a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
+++ b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
@@ -936,7 +936,7 @@ void ARM64InstPrinter::printPostIncOperand(const MCInst *MI, unsigned OpNo,
     else
       O << getRegisterName(Reg);
   } else
-    assert("unknown operand kind in printPostIncOperand64");
+    assert(0 && "unknown operand kind in printPostIncOperand64");
 }
 
 void ARM64InstPrinter::printPostIncOperand1(const MCInst *MI, unsigned OpNo,