From: Nadav Rotem <nadav.rotem@intel.com>
Date: Tue, 4 Oct 2011 12:05:35 +0000 (+0000)
Subject: Set operation actions to legal types only.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=34804c4f4793abbcb908c79fe9512c03090d8520;p=oota-llvm.git

Set operation actions to legal types only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141075 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index 03bfb4ee71e..ac33111f74a 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -402,6 +402,9 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
        i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
     MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
 
+    // Set operation actions to legal types only.
+    if (!isTypeLegal(VT)) continue;
+
     // add/sub are legal for all supported vector VT's.
     setOperationAction(ISD::ADD,     VT, Legal);
     setOperationAction(ISD::SUB,     VT, Legal);
@@ -423,14 +426,12 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
 
     // Custom lower build_vector, constant pool spills, insert and
     // extract vector elements:
-    if (isTypeLegal(VT)) {
-      setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
-      setOperationAction(ISD::ConstantPool, VT, Custom);
-      setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
-      setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
-      setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
-      setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
-    }
+    setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
+    setOperationAction(ISD::ConstantPool, VT, Custom);
+    setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
+    setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
+    setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
+    setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
   }
 
   setOperationAction(ISD::AND, MVT::v16i8, Custom);