From: Jim Grosbach Date: Thu, 1 Sep 2011 18:22:13 +0000 (+0000) Subject: ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=2f25d9b9334662e846460e98a8fe2dae4f233068;p=oota-llvm.git ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index f71d0f8642c..3a0c2609e5c 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2926,7 +2926,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic, if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" && Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls" && Mnemonic != "umlals" && Mnemonic != "umulls" && Mnemonic != "lsls" && - Mnemonic != "sbcs") { + Mnemonic != "sbcs" && Mnemonic != "rscs") { unsigned CC = StringSwitch(Mnemonic.substr(Mnemonic.size()-2)) .Case("eq", ARMCC::EQ) .Case("ne", ARMCC::NE) diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 861d50faa69..fa528467bcf 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1300,6 +1300,7 @@ Lforward: rsc r6, r7, r8, lsr r9 rsc r6, r7, r8, asr r9 rscle r6, r7, r8, ror r9 + rscs r1, r8, #4064 @ destination register is optional rsc r5, #0xf000 @@ -1325,6 +1326,7 @@ Lforward: @ CHECK: rsc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xe7,0xe0] @ CHECK: rsc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xe7,0xe0] @ CHECK: rscle r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xe7,0xd0] +@ CHECK: rscs r1, r8, #4064 @ encoding: [0xfe,0x1e,0xf8,0xe2] @ CHECK: rsc r5, r5, #61440 @ encoding: [0x0f,0x5a,0xe5,0xe2] @ CHECK: rsc r4, r4, r5 @ encoding: [0x05,0x40,0xe4,0xe0]