From: John Keeping <john@metanate.com>
Date: Tue, 23 Feb 2016 13:40:59 +0000 (+0000)
Subject: UPSTREAM: ARM: dts: rockchip: fix MIPI interrupt on rk3288
X-Git-Tag: release-20171130_firefly~4^2~771
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=2d5def6c5ac526a39dffedb56264e8cfd1fb1c09;p=firefly-linux-kernel-4.4.55.git

UPSTREAM: ARM: dts: rockchip: fix MIPI interrupt on rk3288

This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.

Change-Id: I81ad5143296227aa0cd67f7d33e23db6ecc6cf35
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5415ba40650900f7d663a4b79f346c45dddd4ce0)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
---

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index aa0654525855..335ad6a63ed2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1250,7 +1250,7 @@
 	mipi_dsi: mipi@ff960000 {
 		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
 		reg = <0xff960000 0x4000>;
-		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
 		clock-names = "ref", "pclk";
 		power-domains = <&power RK3288_PD_VIO>;