From: chenxing <chenxing@rock-chips.com>
Date: Thu, 29 Nov 2012 06:42:02 +0000 (+0800)
Subject: rk3066b: set 297MHz config to (2, 198, 8)
X-Git-Tag: firefly_0821_release~8162
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=2c1e01c0a199aa0d69aa8465e1cca40599a22b7d;p=firefly-linux-kernel-4.4.55.git

rk3066b: set 297MHz config to (2, 198, 8)
---

diff --git a/arch/arm/mach-rk30/clock_data-rk3066b.c b/arch/arm/mach-rk30/clock_data-rk3066b.c
index fa91dcfb6ba4..16d503cb2191 100644
--- a/arch/arm/mach-rk30/clock_data-rk3066b.c
+++ b/arch/arm/mach-rk30/clock_data-rk3066b.c
@@ -1009,7 +1009,7 @@ static struct clk codec_pll_clk = {
 
 static const struct pll_clk_set gpll_clks[] = {
 	_PLL_SET_CLKS(148500,	2,	99,	8),
-	_PLL_SET_CLKS(297000,	2,	99,	4),
+	_PLL_SET_CLKS(297000,	2,	198,	8),
 	_PLL_SET_CLKS(300000,	1,	50,	4),
 	_PLL_SET_CLKS(594000,	2,	198,	4),
 	_PLL_SET_CLKS(1188000,	2,	99,	1),