From: Tom Stellard <thomas.stellard@amd.com>
Date: Tue, 20 Jan 2015 17:49:41 +0000 (+0000)
Subject: R600/SI: Update SIInstrInfo:verifyInstruction() after r225662
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=2a2bde40ab702b78f4f78777a04e3b60bb4dbb2c;p=oota-llvm.git

R600/SI: Update SIInstrInfo:verifyInstruction() after r225662

Now that we have our own custom register operand types, we need
to handle them in the verifiier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226583 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp
index b2c6ac608ab..8c2f324005a 100644
--- a/lib/Target/R600/SIInstrInfo.cpp
+++ b/lib/Target/R600/SIInstrInfo.cpp
@@ -1130,12 +1130,18 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
     }
 
     switch (Desc.OpInfo[i].OperandType) {
-    case MCOI::OPERAND_REGISTER: {
-      if (MI->getOperand(i).isImm() &&
-          !isImmOperandLegal(MI, i, MI->getOperand(i))) {
-          ErrInfo = "Illegal immediate value for operand.";
-          return false;
-        }
+    case MCOI::OPERAND_REGISTER:
+      if (MI->getOperand(i).isImm() || MI->getOperand(i).isFPImm()) {
+        ErrInfo = "Illegal immediate value for operand.";
+        return false;
+      }
+      break;
+    case AMDGPU::OPERAND_REG_IMM32:
+      break;
+    case AMDGPU::OPERAND_REG_INLINE_C:
+      if (MI->getOperand(i).isImm() && !isInlineConstant(MI->getOperand(i))) {
+        ErrInfo = "Illegal immediate value for operand.";
+        return false;
       }
       break;
     case MCOI::OPERAND_IMMEDIATE: