From: Richard Osborne <richard@xmos.com>
Date: Thu, 24 Feb 2011 13:39:18 +0000 (+0000)
Subject: Add XCore intrinsic for eeu instruction.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=21d7eb3f3b4442cf3bcb4c7fcd279364bba91fc3;p=oota-llvm.git

Add XCore intrinsic for eeu instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126384 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td
index 76a069e5643..944120fc8c6 100644
--- a/include/llvm/IntrinsicsXCore.td
+++ b/include/llvm/IntrinsicsXCore.td
@@ -47,6 +47,7 @@ let TargetPrefix = "xcore" in {  // All intrinsics start with "llvm.xcore.".
                                   [NoCapture<0>]>;
   def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty],
                                  [NoCapture<0>]>;
+  def int_xcore_eeu : Intrinsic<[],[llvm_anyptr_ty], [NoCapture<0>]>;
 
   // Intrinsics for events.
   def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td
index d9bd2a44bec..ecdd4cb6300 100644
--- a/lib/Target/XCore/XCoreInstrInfo.td
+++ b/lib/Target/XCore/XCoreInstrInfo.td
@@ -894,6 +894,10 @@ def SETV_1r : _F1R<(outs), (ins GRRegs:$r),
                "setv res[$r], r11",
                [(int_xcore_setv GRRegs:$r, R11)]>;
 
+def EEU_1r : _F1R<(outs), (ins GRRegs:$r),
+               "eeu res[$r]",
+               [(int_xcore_eeu GRRegs:$r)]>;
+
 // Zero operand short
 // TODO ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
 // stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll
index b34331fa616..3389912b8c0 100644
--- a/test/CodeGen/XCore/resources.ll
+++ b/test/CodeGen/XCore/resources.ll
@@ -18,6 +18,7 @@ declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
 declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
 declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
 declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
+declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
 
 define i8 addrspace(1)* @getr() {
 ; CHECK: getr:
@@ -166,3 +167,10 @@ define void @setv(i8 addrspace(1)* %r, i8* %p) {
 	call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
 	ret void
 }
+
+define void @eeu(i8 addrspace(1)* %r) {
+; CHECK: eeu:
+; CHECK: eeu res[r0]
+	call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
+	ret void
+}