From: Chad Rosier <mcrosier@codeaurora.org>
Date: Mon, 10 Aug 2015 17:17:19 +0000 (+0000)
Subject: Typo. Move comment closer to relevant code. NFC.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=20f59c8f980777a08c8c8768c43c1c69b9f5646b;p=oota-llvm.git

Typo. Move comment closer to relevant code. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244465 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 442abf81e87..d5a3c693105 100644
--- a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -555,11 +555,12 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
 
   // Early exit if the first instruction modifies the base register.
   // e.g., ldr x0, [x0]
-  // Early exit if the offset if not possible to match. (6 bits of positive
-  // range, plus allow an extra one in case we find a later insn that matches
-  // with Offset-1
   if (FirstMI->modifiesRegister(BaseReg, TRI))
     return E;
+
+  // Early exit if the offset if not possible to match. (6 bits of positive
+  // range, plus allow an extra one in case we find a later insn that matches
+  // with Offset-1)
   int OffsetStride =
       IsUnscaled && EnableAArch64UnscaledMemOp ? getMemSize(FirstMI) : 1;
   if (!inBoundsForPair(IsUnscaled, Offset, OffsetStride))