From: Jakob Stoklund Olesen Date: Mon, 2 May 2011 20:06:28 +0000 (+0000) Subject: Only ignore use operands, keep the ops. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=2048e4ab7fb4ed45bae2159bae600ddf610303b1;p=oota-llvm.git Only ignore use operands, keep the ops. Def operands may also have an flag, but that just means that a sub-register redef doesn't actually read the super-register. For physical registers, it has no meaning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130714 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index ebfe533838d..e2c25aba02e 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -154,13 +154,16 @@ void RegScavenger::forward() { BitVector DeadRegs(NumPhysRegs); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.isUndef()) + if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); if (!Reg || isReserved(Reg)) continue; if (MO.isUse()) { + // Ignore undef uses. + if (MO.isUndef()) + continue; // Two-address operands implicitly kill. if (!isPred && (MO.isKill() || MI->isRegTiedToDefOperand(i))) addRegWithSubRegs(KillRegs, Reg);