From: Evan Cheng <evan.cheng@apple.com>
Date: Wed, 10 May 2006 22:30:41 +0000 (+0000)
Subject: If the live interval legnth is essentially zero, i.e. in every live range
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=1f300190f35ac0f99403ead9363d40ecfc98df89;p=oota-llvm.git

If the live interval legnth is essentially zero, i.e. in every live range
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28217 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 59467c1e0f8..fd7d5a6d760 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -406,6 +406,14 @@ static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
   }
 }
 
+static bool isZeroLengthInterval(LiveInterval *li) {
+  for (LiveInterval::Ranges::const_iterator
+         i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
+    if (i->end - i->start > LiveIntervals::InstrSlots::NUM)
+      return false;
+  return true;
+}
+
 
 /// assignRegOrStackSlotAtInterval - assign a register if one is available, or
 /// spill.
@@ -557,10 +565,16 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
   DEBUG(std::cerr << "\t\tregister with min weight: "
         << mri_->getName(minReg) << " (" << minWeight << ")\n");
 
+  // If the live interval legnth is essentially zero, i.e. in every live range
+  // the use follows def immediately, it doesn't make sense to spill it and
+  // hope it will be easier to allocate for this li.
+  if (isZeroLengthInterval(cur))
+    DEBUG(std::cerr << "\t\tavoid spilling zero length live interval: "
+          << *cur << '\n';);
   // if the current has the minimum weight, we need to spill it and
   // add any added intervals back to unhandled, and restart
   // linearscan.
-  if (cur->weight <= minWeight) {
+  else if (cur->weight <= minWeight) {
     DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
     int slot = vrm_->assignVirt2StackSlot(cur->reg);
     std::vector<LiveInterval*> added =