From: Misha Brukman <brukman+llvm@gmail.com>
Date: Thu, 13 Nov 2003 00:16:28 +0000 (+0000)
Subject: * Put command-line switches in their own namespace
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=1be1a235d77c5ae5b658fca0249dadd89e8220ed;p=oota-llvm.git

* Put command-line switches in their own namespace
* Pass creation functions are no longer in the UltraSparc class


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9950 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index 73f2fd81395..1502dfc0f30 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -44,21 +44,23 @@ const TargetInstrDescriptor SparcMachineInstrDesc[] = {
 // Command line options to control choice of code generation passes.
 //---------------------------------------------------------------------------
 
-static cl::opt<bool> DisableSched("disable-sched",
-                                  cl::desc("Disable local scheduling pass"));
+namespace {
+  cl::opt<bool> DisableSched("disable-sched",
+                             cl::desc("Disable local scheduling pass"));
 
-static cl::opt<bool> DisablePeephole("disable-peephole",
+  cl::opt<bool> DisablePeephole("disable-peephole",
                                 cl::desc("Disable peephole optimization pass"));
 
-static cl::opt<bool> EmitMappingInfo("enable-maps",
-             cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
+  cl::opt<bool> EmitMappingInfo("enable-maps",
+                 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
 
-static cl::opt<bool> DisableStrip("disable-strip",
-	     cl::desc("Do not strip the LLVM bytecode included in executable"));
+  cl::opt<bool> DisableStrip("disable-strip",
+                      cl::desc("Do not strip the LLVM bytecode in executable"));
 
-static cl::opt<bool> DumpInput("dump-input",
-                      cl::desc("Print bytecode before native code generation"),
-                      cl::Hidden);
+  cl::opt<bool> DumpInput("dump-input",
+                          cl::desc("Print bytecode before code generation"),
+                          cl::Hidden);
+}
 
 //----------------------------------------------------------------------------
 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
@@ -196,7 +198,7 @@ bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
 
   PM.add(getRegisterAllocator(*this));
 
-  PM.add(getPrologEpilogInsertionPass());
+  PM.add(createPrologEpilogInsertionPass());
 
   if (!DisablePeephole)
     PM.add(createPeepholeOptsPass(*this));
@@ -210,15 +212,12 @@ bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
   // allowing machine code representations for functions to be free'd after the
   // function has been emitted.
   //
-  PM.add(getFunctionAsmPrinterPass(Out));
+  PM.add(createAsmPrinterPass(Out, *this));
   PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
 
-  // Emit Module level assembly after all of the functions have been processed.
-  PM.add(getModuleAsmPrinterPass(Out));
-
   // Emit bytecode to the assembly file into its special section next
   if (EmitMappingInfo)
-    PM.add(getBytecodeAsmPrinterPass(Out));
+    PM.add(createBytecodeAsmPrinterPass(Out));
 
   return false;
 }
@@ -262,7 +261,7 @@ bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
   PM.add(createInstructionSelectionPass(*this));
 
   PM.add(getRegisterAllocator(*this));
-  PM.add(getPrologEpilogInsertionPass());
+  PM.add(createPrologEpilogInsertionPass());
 
   if (!DisablePeephole)
     PM.add(createPeepholeOptsPass(*this));