From: Bill Schmidt Date: Fri, 12 Sep 2014 14:26:36 +0000 (+0000) Subject: Address comments on r217622 X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=183704cb08e8a5bf08a010e4605f9d694e0869ee;p=oota-llvm.git Address comments on r217622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217680 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index c038db7420b..5b68a9eaacf 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -278,10 +278,12 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, case 'U': // Print 'u' for update form. case 'X': // Print 'x' for indexed form. { - // Memory constraints should always produce an MO_Register, - // so we never get an update or indexed form. (In GCC, these - // are useful in internal code gen; not so much in inline asm.) - // So tolerate these but don't output anything. + // FIXME: Currently for PowerPC memory operands are always loaded + // into a register, so we never get an update or indexed form. + // This is bad even for offset forms, since even if we know we + // have a value in -16(r1), we will generate a load into r + // and then load from 0(r). Until that issue is fixed, + // tolerate 'U' and 'X' but don't output anything. assert(MI->getOperand(OpNo).isReg()); return false; } diff --git a/test/CodeGen/PowerPC/asm-constraints.ll b/test/CodeGen/PowerPC/asm-constraints.ll index b8eb5efc869..998b61834f4 100644 --- a/test/CodeGen/PowerPC/asm-constraints.ll +++ b/test/CodeGen/PowerPC/asm-constraints.ll @@ -1,5 +1,17 @@ ; RUN: llc < %s -mcpu=pwr8 | FileCheck %s +; Generated from following C code: +; +; void foo (int result, char *addr) { +; __asm__ __volatile__ ( +; "ld%U1%X1 %0,%1\n" +; "cmpw %0,%0\n" +; "bne- 1f\n" +; "1: isync\n" +; : "=r" (result) +; : "m"(*addr) : "memory", "cr0"); +; } + target datalayout = "e-m:e-i64:64-n32:64" target triple = "powerpc64le-unknown-linux-gnu"