From: Brian Gaeke <gaeke@uiuc.edu>
Date: Thu, 12 Feb 2004 04:01:07 +0000 (+0000)
Subject: Remove this MachineOpCodeFlags assertion - its test can never be false.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=17247c64f2511ca1aca2424f0208a6a0a1ec18c8;p=oota-llvm.git

Remove this MachineOpCodeFlags assertion - its test can never be false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11342 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 0cb1776f8aa..4a7d503f5b2 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -530,8 +530,6 @@ void PhyRegAlloc::updateMachineCode()
                          AddedInstrMap[DelaySlotMI].InstrnsAfter.size()  > 0));
 
           if (cond1 || cond2) {
-              assert((MII->getOpCodeFlags() & AnnulFlag) == 0 &&
-                     "FIXME: Moving an annulled delay slot instruction!"); 
               assert(delaySlots==1 &&
                      "InsertBefore does not yet handle >1 delay slots!");