From: Andrew Lenharth <andrewl@lenharth.org>
Date: Thu, 27 Jan 2005 07:58:15 +0000 (+0000)
Subject: Floating point instructions like Floating point registers
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=10b400705dcdef25754b3c3c765c40c6513df1b1;p=oota-llvm.git

Floating point instructions like Floating point registers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19856 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index b9abf4661b4..bae321edaad 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -333,7 +333,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
     if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) {
       if (CN->isExactlyValue(+0.0) ||
           CN->isExactlyValue(-0.0)) {
-        BuildMI(BB, Alpha::CPYS, 2, Result).addReg(R31).addReg(R31);
+        BuildMI(BB, Alpha::CPYS, 2, Result).addReg(Alpha::F31).addReg(Alpha::F31);
       } else {
         abort();
       }