From: Jim Grosbach <grosbach@apple.com>
Date: Wed, 8 Sep 2010 00:26:59 +0000 (+0000)
Subject: correct spill code to properly determine if dynamic stack realignment is
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=0cfcf93c95af91e809ef740eb0ab368477226b40;p=oota-llvm.git

correct spill code to properly determine if dynamic stack realignment is
present in the function and thus whether aligned load/store instructions can
be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113323 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 79e9a588928..a7edea5dbff 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -748,7 +748,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   case ARM::QPR_VFP2RegClassID:
   case ARM::QPR_8RegClassID:
     // FIXME: Neon instructions should support predicates
-    if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) {
+    if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
       AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VST1q))
                      .addFrameIndex(FI).addImm(16)
                      .addReg(SrcReg, getKillRegState(isKill))
@@ -846,7 +846,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   case ARM::QPRRegClassID:
   case ARM::QPR_VFP2RegClassID:
   case ARM::QPR_8RegClassID:
-    if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) {
+    if (Align >= 16 && getRegisterInfo().needsStackRealignment(MF)) {
       AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLD1q), DestReg)
                      .addFrameIndex(FI).addImm(16)
                      .addMemOperand(MMO));